ArXiv: 2510.25602

🎯 Pitch

Contrary to the FP-centric design of modern AI accelerators like NVIDIA’s Blackwell, this paper shows that fine-grained integer quantization (MXINT8) consistently beats its floating-point equivalent in both accuracy and hardware efficiency. Even at 4 bits, integer can surpass FP once simple outlier suppression is applied, revealing a critical performance crossover that the industry has overlooked.


1. Executive Summary

This paper systematically compares integer (INT) and floating-point (FP) quantization formats across varying granularities for large language models, revealing a critical crossover in performance that challenges the FP-centric trajectory of modern AI hardware. Using direct-cast inference on 12 LLMs ranging from 0.6B to 235B parameters (Qwen3 and Llama-3 families) and low-bit training on Llama-style 1B and 3B models, the study demonstrates that MXINT8 consistently outperforms MXFP8 in both algorithmic accuracy and hardware efficiency — with QSNR averaging 40.35 dB versus 31.50 dB for MXFP8 — while introducing a symmetric clipping method that resolves gradient bias and enables nearly lossless MXINT8 training (matching BF16 accuracy within 0.01 average across six reasoning tasks). The analysis also shows that NVINT4 can surpass NVFP4 when combined with Hadamard rotation (64.3% win rate rising to 99.3% post-rotation), establishing that fine-grained INT formats dominate over FP counterparts only when the block-local crest factor falls below format-specific crossover thresholds (κ < 7.55 for 8-bit, κ < 2.39 for 4-bit).

2. Context and Motivation

The Core Problem: Understanding When INT Beats FP in Fine-Grained Quantization

The fundamental question this paper tackles sits at the intersection of algorithm design and hardware architecture: as we push quantization to finer granularities with smaller block sizes, how does the performance trade-off between integer and floating-point number formats evolve, and which format should future AI accelerators prioritize?

This question has become urgent for a very specific reason. Modern AI hardware is making a decisive architectural bet on floating-point formats. Nvidia's Blackwell architecture provides native hardware support for MXFP8, MXFP6, MXFP4, and NVFP4. The OCP Microscaling (MX) standard, which underpins these formats, was designed with floating-point representations in mind. The industry trajectory is clear: FP is winning, and INT is being left behind.

But the paper argues this trajectory is based on an incomplete picture. The key insight that prior work missed is that the INT vs. FP comparison is not static — it depends critically on quantization granularity. At coarse granularities (per-tensor, per-channel), FP's superior dynamic range makes it the clear winner because it can accommodate the wide range of activation values within a single scaling group, particularly the notorious outliers in LLM activations. However, as block sizes shrink, the local dynamic range within each block contracts, and the uniform precision of INT formats becomes increasingly competitive. The paper's central contribution is to identify, characterize, and exploit this crossover point — showing that at the granularities modern hardware has already adopted (block size 32 for MX, block size 16 for NV), INT often dominates FP in the 8-bit regime, and even at 4 bits INT can win under the right conditions.

Why This Matters: Hardware Architecture Decisions Have Long Lock-In Periods

The importance of this question extends far beyond an academic comparison of number formats. Hardware architectures, once designed and deployed at scale, exhibit significant path dependence. If the entire industry converges on FP-centric low-precision compute units, future accelerators will be optimized for FP arithmetic, and integer formats will face an uphill battle for adoption even if they prove algorithmically superior.

The stakes are substantial across multiple dimensions:

1. Energy and area efficiency. The paper's hardware analysis (Table 5) demonstrates that MXINT8 reduces energy by 37% and area by 21% compared to MXFP8 at the same throughput. For NVINT4 versus NVFP4, the savings are even larger: 38% energy reduction and 30% area reduction. In a world where LLM inference and training already consume massive compute resources, these efficiency gains translate directly into lower operational costs, reduced carbon footprint, and the ability to deploy larger models on fixed hardware budgets.

2. Algorithmic accuracy ceiling. If platforms hard-code FP-specific data paths based on an incomplete understanding of the INT-vs-FP trade-off, the field may unknowingly accept suboptimal accuracy for a given bit budget. The paper demonstrates that MXINT8 achieves an average QSNR of 40.35 dB versus MXFP8's 31.50 dB (Figure 4a) — nearly 9 dB higher signal fidelity for the same 8-bit storage and bandwidth. This is not a marginal improvement; it represents fundamentally better preservation of the original tensor's information, which can cascade into improved downstream task performance and more stable training.

3. Training efficiency. Perhaps most critically for the long-term evolution of LLMs, the paper demonstrates that MXINT8 supports nearly lossless low-bit training (Figure 5, Table 4) — matching BF16 accuracy within 0.01 average across six reasoning tasks while using half the precision. If INT8 training can match FP8 training accuracy while being cheaper in hardware, the economic case for pretraining large models shifts. Every FLOP saved during training compounds across the enormous training budgets of modern LLMs (hundreds of billions to trillions of tokens).

4. The mixed-precision design space. Modern GPUs like Blackwell support multiple formats simultaneously (8-bit and 4-bit). The paper's mixed-format analysis shows that an "MXINT8 + NVINT4" configuration reduces area by 34% compared to "MXFP8 + NVFP4" (Table 5). This matters because circuit reuse is simpler in the INT pipeline — integer datapaths can be reconfigured to handle multiple bit widths more naturally than FP datapaths, which require different exponent/mantissa decompositions and alignment logic per format. Getting the format choice right at the architecture level unlocks better resource sharing across precision modes.

The Gap in Prior Work: No Unified Comparison Framework Across Granularities

The paper identifies several distinct shortcomings in existing literature that collectively motivate its comprehensive study.

Studies examine formats in isolation. Most quantization research focuses on a single format — either INT or FP — and optimizes within that format's constraints without asking whether the format itself is optimal. Works on INT quantization for LLMs (Dettmers et al., 2022; Frantar et al., 2022; Xiao et al., 2023; Lin et al., 2023, Shao et al., 2023; Chen et al., 2024) develop sophisticated outlier-handling techniques (SmoothQuant, AWQ, GPTQ, OmniQuant) but operate entirely within the integer paradigm. Conversely, work on FP8/FP4 training and inference (Mishra et al., 2025; Tseng et al., 2025; Castro et al., 2025) develops recipes for FP without comparing against INT baselines. The OCP MX specification itself (Darvish Rouhani et al., 2023) was evaluated primarily with FP formats, with INT variants treated as an afterthought.

Coarse-granularity comparisons miss the crossover. The few works that do compare INT and FP (e.g., Zhang et al., 2024) primarily examine coarse granularities where FP's dynamic range advantage dominates. Zhang et al. study mixed-format quantization in a post-training setting, assigning INT or FP to different parts of the model, but do not systematically analyze how the comparison changes as block sizes decrease. The crucial observation that fine granularity shrinks local dynamic range, making INT's uniform precision relatively more valuable, had not been formalized or empirically validated at the scale this paper provides.

Hardware trends outpace algorithmic understanding. The hardware community has already committed to fine-grained FP formats in silicon, with Blackwell providing native MXFP8/MXFP6/MXFP4 support and NVFP4 as a proprietary enhancement. This hardware decision was driven by the intuition that FP handles outliers better — a reasonable assumption at coarse granularities. But by the time block sizes reach 32 elements (MX standard), the paper's analysis shows that the local crest factor (κ) has a 75th percentile of only 2.96 (Table 2), far below the 8-bit crossover threshold of 7.55 (Figure 3). In other words, the hardware was designed for a regime where the chosen format is suboptimal. The paper's motivation is, in part, to correct this trajectory before FP-centric designs become too deeply entrenched.

Where Prior Approaches Fall Short: Specific Limitations

The paper identifies four concrete limitations in existing approaches that it directly addresses.

1. No theoretical framework for comparing INT and FP QSNR at fine granularity. Prior work lacks a unified analytical model that expresses the quantization error of both INT and FP formats in terms of the same distributional properties — specifically, the block-local crest factor κ. The paper's Theorems 1 and 2 provide closed-form QSNR approximations for both format families (Equations 13 and 14), revealing that INT QSNR follows 4.78+6.02b20log10(ρ)20log10(κ)4.78 + 6.02b - 20\log_{10}(\rho) - 20\log_{10}(\kappa) while FP QSNR is mantissa-bound at 13.80+6.02M13.80 + 6.02M dB in the ample dynamic range regime but degrades with subnormal probability psubp_{\text{sub}} as κ increases. This theoretical framework makes quantitative predictions about crossover points (κ = 7.55 for 8-bit, κ = 2.39 for 4-bit in NV format) that can be tested against real data. Without this theory, the community had only empirical heuristics for format selection.

2. INT training with fine-grained quantization is underexplored. The paper explicitly notes that existing low-bit training work focuses on FP8 (Mishra et al., 2025; DeepSeek-V3, Liu et al., 2024) and FP4 (Tseng et al., 2025; Chen et al., 2025; Castro et al., 2025), with almost no investigation of INT8 training at comparable granularities. This is partly because INT training has a subtle but critical failure mode: the asymmetric range of two's complement signed integers ([2b1,2b11][-2^{b-1}, 2^{b-1}-1]) introduces a persistent negative gradient bias. The paper demonstrates this concretely in Figure 2, showing that standard INT8 with [128,127][-128, 127] range degrades training loss relative to both BF16 and symmetric [127,127][-127, 127] clipping. Without the symmetric clipping fix the paper introduces (Equation 19, setting Qmin=(2b11)Q_{\min} = -(2^{b-1}-1)), INT training would appear inferior to FP training, and the community would never discover that INT8 can actually match or exceed FP8.

3. Hardware cost comparisons are absent from algorithm papers. Most quantization algorithm papers evaluate only accuracy or perplexity, leaving hardware efficiency as an implicit assumption ("lower bit width = better"). The paper provides a gate-level hardware model (Appendix C) that decomposes MAC unit cost into multiplier, adder, aligner, normalizer, and accumulator components, parameterized by exponent width, mantissa width, and lane count. This model reveals a non-obvious dynamic: FP multipliers are actually more area-efficient than INT multipliers at the same bit width (since FP multiplies only mantissas, while INT multiplies all bits including the sign-extended range), but FP adders are substantially more expensive due to exponent comparison, mantissa alignment, and normalization. The net result depends on the relative cost of these operations at the target lane count and format. Without this analysis, the hardware community lacks a rigorous basis for choosing between format families.

4. No systematic empirical comparison across diverse models and formats. The paper evaluates 12 models spanning 0.6B to 235B parameters, covering both dense (Llama-3, Qwen3 dense variants) and Mixture-of-Experts (Qwen3 MoE) architectures, with two leading model families. Prior comparisons typically evaluate 1-3 models at a single size, making it impossible to assess whether format preferences generalize across architectures and scales. The paper's finding that MXINT8 outperforms MXFP8 on all 12 models (Table 3) provides the kind of robust evidence needed to influence hardware design decisions.

How This Paper Positions Itself

The paper positions itself not as proposing a new quantization algorithm, but as providing a comprehensive, multi-level comparison framework that combines theory, empirical measurement, and hardware analysis to resolve a question of strategic importance for the field. Several aspects of this positioning are notable:

Theory-driven empiricism. Rather than purely benchmarking formats and reporting which wins, the paper develops QSNR theory first, uses it to predict crossover points, then validates predictions against measured QSNR on 10,752 real tensors from the Llama-3.1-8B computation graph (6 tensor types × 224 linear layers). The theory explains why the empirical results occur, making the findings transferable to new models and formats rather than specific to the evaluated configurations.

Granularity as the independent variable. The paper's key intellectual move is to treat quantization granularity not as a fixed implementation detail but as the primary variable that determines the relative value of dynamic range (FP's strength) versus uniform precision (INT's strength). The crossover framework (Figure 3) makes this relationship explicit: as block size decreases, κ shrinks, and the QSNR curves intersect at predictable points. This reframes the INT-vs-FP debate from a static format comparison to a question about where in granularity space each format's advantages dominate.

Algorithm-hardware co-design advocacy. The paper explicitly positions itself as an intervention in hardware design decisions, arguing that "a one-size-fits-all FP approach is suboptimal" and calling for "a strategic shift in both academia and industry toward algorithm-hardware co-design that re-evaluates and prioritizes fine-grained INT formats" (Section 7). This is not a typical algorithm paper that assumes hardware as fixed; it actively argues for changing the hardware trajectory based on algorithmic evidence.

Resolution of an apparent contradiction. Prior work contained an implicit tension: coarse-granularity studies favored FP, while some fine-grained results hinted at INT competitiveness. The paper resolves this by showing they are both correct — just at different points along the granularity spectrum. The crossover framework provides a unified explanation that reconciles apparently conflicting findings in the literature.

Practical recipe for practitioners. Beyond the theoretical and empirical contributions, the paper provides concrete guidance: use symmetric clipping for INT training (Section 3.2), round up UE8M0 scales rather than rounding down (Equation 9), and combine Hadamard rotation with NVINT4 to surpass NVFP4 accuracy (Table 3). These are immediately actionable for teams implementing low-bit training or inference.

3. Technical Approach

3.1 Reader Orientation

This paper is a systematic, multi-level comparison framework — not a single algorithm — that evaluates integer (INT) versus floating-point (FP) quantization formats for large language models by combining theoretical analysis, empirical measurement on 10,752 real tensors, direct-cast inference on 12 models, low-bit training experiments, and gate-level hardware modeling. The system it builds is a unified analytical and experimental pipeline that answers the question: given a target bit width, quantization granularity (block size), and data distribution, which number format (INT or FP) yields higher numerical fidelity, better task performance, and lower hardware cost? The solution "shape" is a three-layer analysis stack — theoretical QSNR prediction → tensor-level measurement validation → end-to-end model benchmarking — that progressively tests format performance from first principles through to production-scale LLM deployment.

3.2 Big-Picture Architecture (Diagram in Words)

The paper's comparison framework operates across four interconnected analysis layers:

  1. Theoretical QSNR Engine (Section 4): A set of closed-form approximations (Theorems 1 and 2) that predict the quantization signal-to-noise ratio for any INT or FP format, parameterized only by bit width, mantissa bits, block size, and the data distribution's crest factor (κ). This layer produces QSNR-vs-κ curves (Figure 3) that predict crossover thresholds — the κ values below which INT outperforms FP — for each format comparison.

  2. Tensor-Level Measurement Pipeline (Section 5.1): A data collection and analysis system that captures all six tensor types (activations, weights, gradients) from both forward and backward passes of Llama-3.1-8B across 224 linear layers, producing 10,752 tensors. For each tensor, the system computes the block-wise crest factor distribution and directly measures QSNR under both INT and FP quantization with and without Hadamard rotation. This layer validates theoretical predictions against real LLM data and produces the "win rate" statistics (e.g., "MXINT8 wins 100% at block size 32").

  3. End-to-End Model Evaluator (Sections 5.2–5.3): Two deployment scenarios:

    • Direct-cast inference on 12 LLMs (0.6B–235B parameters, dense and MoE) comparing 8 formats (MXFP8/6/4, MXINT8/6/4, NVFP4, NVINT4) using KL divergence against BF16 as the metric.
    • Low-bit training on 1B/3B Llama-style models for 100B/200B tokens comparing MXFP8 vs. MXINT8 training loss and downstream accuracy on 6 reasoning tasks.

    This layer tests whether QSNR advantages translate to real model performance.

  4. Hardware Cost Model (Section 6 and Appendix C): A gate-level chip area and energy estimator that decomposes a k-lane Matrix-Multiply Unit (MMU) into multiplier, adder tree, exponent units, aligner, normalizer, dequantizer, and FP32 accumulator sub-blocks, parameterized by exponent width x, mantissa width y, lane count k, and aligner width n (computed from format parameters). Outputs are relative energy and area costs normalized to MXFP8.

Information flows sequentially: the theory predicts crossover points → tensor measurements confirm them on real data → model evaluations translate QSNR advantages to task performance → hardware analysis assesses the practical efficiency case. The four layers are linked by a common dependence on the crest factor κ and format parameters (bit width, mantissa bits, block size).

3.3 Roadmap for the Deep Dive

  • First, the quantization operation mechanics (scale factor computation, symmetric clipping, UE8M0 rounding) — these underpin everything and differ between INT and FP in subtle ways that affect accuracy.
  • Second, the theoretical QSNR framework (Theorems 1 and 2 with their derivations from Appendix B) — this establishes why the comparison depends on crest factor and what the predicted crossover thresholds are. Understanding the theory is essential for interpreting every subsequent result, so we walk through the error models, the assumptions, and the closed-form expressions in detail.
  • Third, the tensor measurement methodology — how the 10,752 tensors are collected, how crest factors and QSNR are computed at different block sizes, and how the Hadamard rotation experiments are set up. This section explains how real measurements validate the theoretical predictions.
  • Fourth, the direct-cast inference protocol — model selection, metric choice (KL divergence on top-25 logits), and the format comparison logic across 8 formats and 12 models.
  • Fifth, the low-bit training setup — model architectures, training hyperparameters, the symmetric clipping fix for INT8 training, and the evaluation methodology.
  • Sixth, the hardware cost modeling framework (Appendix C) — the gate-level decomposition, the aligner width computation, the reuse schemes for mixed-format configurations, and how area/energy are estimated and compared.

3.4 Detailed, Sentence-Based Technical Breakdown

This is primarily an analytical comparison paper whose core idea is that the INT vs. FP quantization trade-off is governed by a single data-distribution property (the block-local crest factor κ), that κ decreases predictably as block size shrinks, and that at the fine grain sizes modern hardware has already adopted (block 32 for MX, block 16 for NV), the observed κ distributions place 8-bit INT operationally above its FP counterpart while 4-bit INT reaches parity or superiority only after outlier mitigation (Hadamard rotation).


Quantization Operation Mechanics

The quantization operation Quantize(X) maps a high-precision tensor X to a lower-bit representation. The process has two stages: computing a scale factor s that normalises the data to the target format's representable range, and then mapping each normalized value to the nearest codebook entry.

Scale factor computation. For both INT and FP quantizers, the paper uses the AbsMax quantizer:

s=max(X)Qmaxs = \frac{\max(|X|)}{Q_{\max}}

where max(|X|) is the maximum absolute value within the block of elements that share a single scale factor, and Q_max is the maximum representable value of the target format (e.g., Q_max = 127 for signed symmetric INT8, Q_max = 448 for E4M3 FP8).

What it computes: the scaling factor s that, when applied to every element in the block, normalizes the block's maximum absolute value to exactly the format's maximum representable value, thereby using the full dynamic range without overflow.

Why this form: AbsMax scaling is the simplest and most hardware-friendly quantizer — it requires only a maximum-finding operation per block (parallel reducible) and a single division. No per-channel mean subtraction or learned clipping thresholds are used, which keeps the comparison focused on format differences rather than quantizer sophistication. The trade-off is that AbsMax is sensitive to outliers: a single large activation in a block compresses the quantization grid for all other elements in that block, which is precisely why finer granularity (smaller blocks) helps — it confines outliers to their own scaling groups.

UE8M0 scale format. For MX-family formats, the high-precision scale factor s is further converted to the UE8M0 format, which is an 8-bit unsigned floating-point type with zero mantissa bits (exponent only). The standard OCP specification rounds the scale down:

sdown=2clip(log2(max(X))log2(Qmax),127,127)s'_{\text{down}} = 2^{\text{clip}(\lfloor \log_2(\max(|X|)) \rfloor - \lfloor \log_2(Q_{\max}) \rfloor, -127, 127)}

However, the paper follows prior work and rounds up to avoid additional clipping error:

s=2clip(log2(s),127,127)s' = 2^{\text{clip}(\lceil \log_2(s) \rceil, -127, 127)}

What it computes: a power-of-two approximation of the ideal scale, where s' >= s, meaning the scale is always at least as large as the ideal scale. Since s' >= s, the normalized values X/s' are guaranteed to stay within the codebook range — no upper clipping occurs due to scale representation error (only rounding to codebook entries).

Why round up instead of down: rounding down (s' < s) would cause X/s' > Q_max for the block maximum, leading to saturation/clipping of the largest values, which are often the most information-rich activations in LLMs. Rounding up trades slightly coarser quantization (the step size is a factor of ρ larger, where 1 <= ρ < 2) for the guarantee that no values overflow. The cost is modelled in Theorem 1 as a -20 log_10(ρ) penalty in QSNR, which can be up to ~6 dB in the worst case (ρ ≈ 2) but is bounded and predictable.

INT quantization mapping. For b-bit integer quantization with symmetric range, the quantize-dequantize operation is:

Xq=clip(Xs,Qmin,Qmax)sX_q = \text{clip}\left(\left\lfloor \frac{X}{s'} \right\rceil, Q_{\min}, Q_{\max}\right) \cdot s'

where Q_min = -(2^(b-1) - 1) and Q_max = 2^(b-1) - 1, and ⌊·⌉ denotes round-to-nearest. The clip function constrains the integer values to stay within the representable range.

Symmetric clipping for INT training (the gradient bias fix). Standard two's complement signed integers have an asymmetric range: for a b-bit integer, Q_min = -2^(b-1) and Q_max = 2^(b-1) - 1, meaning there is one more negative value than positive values. The paper demonstrates (Figure 2, Table 10) that this asymmetry introduces a persistent negative bias in gradients during low-bit training that degrades the loss. The effect is counterintuitively worse at finer granularities because smaller blocks mean proportionally more values map to the unique negative extreme Q_min. The fix is to simply discard the extra negative value and use a symmetric range:

Qmin=(2b11),Qmax=2b11Q_{\min} = -(2^{b-1} - 1), \quad Q_{\max} = 2^{b-1} - 1

What it computes: the symmetric clipping operation discards the integer code -2^(b-1) and treats -2^(b-1) in the data as mapping to Q_min = -(2^(b-1) - 1) via the clip function. This ensures that the quantization error has zero mean (symmetric around zero).

Why this matters: the paper demonstrates this with a concrete experiment (Figure 2). A 145M model trained for 20B tokens with 8-bit quantization at block size 32 using BFloat16 scale factors: asymmetric [-128, 127] produces a final loss of 3.1354, while symmetric [-127, 127] produces 3.1251 — a meaningful improvement for training loss. The effect is even more dramatic with finer granularities (block size 64: 3.1312 vs. 3.1269; block size 128: 3.1309 vs. 3.1289; block size 256: 3.1340 vs. 3.1307; per-channel: 3.2544 vs. 3.2560). The numerical stability analysis in Appendix D.2 further reveals a surprising BFloat16 artefact: even when the scale s is designed to map values to 127, the low precision of BFloat16 causes 16.82% of values (in a random matrix test) to round to -128 due to floating-point representation error in the division X / s. This makes symmetric clipping not just a statistical preference but a numerical necessity when using BFloat16 scale arithmetic.

FP quantization mapping. For floating-point quantization:

Xq=Nearest(Xs,CFP)sX_q = \text{Nearest}\left(\frac{X}{s'}, C_{\text{FP}}\right) \cdot s'

where Nearest(·, C_FP) maps each normalized value to the closest element in the FP codebook C_FP. The FP codebook is inherently symmetric around zero (the overflow negative value problem doesn't exist), and the codebook has non-uniform spacing — denser near zero (subnormal and small normal numbers) and coarser at large magnitudes (large normal numbers). This is why FP naturally handles outliers: large values get coarser quantization (larger absolute error) but the relative error is bounded by the mantissa width, while small values get fine quantization.

Quantization in the compute flow. Figure 1 diagrams the six quantization points in a single linear layer during training:

  1. Forward activation quantization: Quantize(X) along the GEMM reduction dimension.
  2. Forward weight quantization: Quantize(W) along the GEMM reduction dimension.
  3. Backward output gradient quantization: Quantize(dY) along the reduction dimension.
  4. Backward weight transpose quantization: Quantize(W^T) along the reduction dimension.
  5. Backward input transpose quantization: Quantize(X^T) along the reduction dimension.
  6. Backward weight gradient quantization: Quantize(dY^T) along the reduction dimension.

The key design constraint is that for block-wise quantization to provide hardware benefits, tensors must be quantized along the GEMM reduction dimension — the dimension being contracted in the matrix multiplication. This allows the scale factors to be applied per-block in the output without cross-block communication. Operations ① and ⑤, ② and ④, and ③ and ⑥ are quantized along different axes because the transpose operations swap which dimension is the reduction dimension.


Theoretical QSNR Framework

The theoretical framework quantifies the numerical fidelity of any quantization format using a single metric: the Quantization Signal-to-Noise Ratio (QSNR), expressed in decibels:

QSNR=10log10(XXq2X2)\text{QSNR} = -10 \log_{10}\left(\frac{\|X - X_q\|^2}{\|X\|^2}\right)

where X is the original high-precision tensor, X_q is the dequantized tensor, and ||·|| denotes the L2 norm.

What it computes: the ratio of the signal power (the squared norm of the original tensor) to the noise power (the squared norm of the quantization error), expressed in decibels. A higher QSNR means the quantized tensor preserves more of the original tensor's magnitude and direction — higher QSNR implies less information loss.

Why this metric: QSNR is directly related to the expected cosine similarity between the original and quantized vectors (for fixed-norm vectors, lower MSE implies higher cosine similarity), which is the relevant property for linear algebra operations like matrix multiplication. The decibel scale is standard in signal processing and makes multiplicative effects additive. The metric is also independent of the absolute scale of the data, allowing comparison across different layers and model sizes.

Common assumptions for both theorems. The theoretical analysis considers block vectors X ∈ ℝ^g (a block of g elements) with entries drawn independently from a zero-mean normal distribution: X_i ~ N(0, σ²). The block root-mean-square equals σ, and the crest factor is defined as:

κ:=max(X)σ\kappa := \frac{\max(|X|)}{\sigma}

The crest factor is the ratio of the peak absolute value to the RMS — it quantifies how "spiky" the distribution is within a block. A Gaussian distribution has a typical κ of around 2-3 for moderate block sizes (the expected maximum of g i.i.d. standard normals grows as √(2 log g)).

The blockwise scale factor s' is modelled as:

s=ρss' = \rho \cdot s

where s is the ideal high-precision scale from equation (7), and ρ ∈ [1, 2) models the overhead of the low-precision scale format. For UE8M0 (power-of-two) scales, ρ is the ratio of the rounded-up power-of-two to the ideal value. For E4M3 scales (used in NV formats), ρ ≈ 1 since the E4M3 exponent range closely approximates arbitrary values.

Theorem 1: INT QSNR.

QSNRINT{4.78+6.02b20log10(ρ)20log10(κ),UE8M0 scale4.78+6.02b20log10(κ)+10log10(gg1),E4M3 scale\text{QSNR}_{\text{INT}} \approx \begin{cases} 4.78 + 6.02b - 20\log_{10}(\rho) - 20\log_{10}(\kappa), & \text{UE8M0 scale} \\[6pt] 4.78 + 6.02b - 20\log_{10}(\kappa) + 10\log_{10}\left(\frac{g}{g-1}\right), & \text{E4M3 scale} \end{cases}

where b is the bit width, ρ ∈ [1, 2) is the scale overhead factor, κ is the crest factor, and g is the block size in elements.

What it computes: the predicted QSNR in decibels for b-bit integer quantization, as a function of the block-local crest factor κ and the scale format properties.

Derivation walkthrough (from Appendix B.2). The proof proceeds in four steps:

  1. Error model: Under the standard high-resolution quantizer model (Bennett, 1948), for a uniform quantizer with step size Δ and non-saturating operation, the quantization error e = X - X_q is approximately uniform on [-Δ/2, Δ/2] and independent of X, giving E[e²] = Δ²/12.

  2. Express Δ via crest factor: The effective quantization step is Δ = s' = ρs = ρ·κ·σ / Q, where Q = 2^(b-1) - 1 is the largest integer code (using Q ≈ 2^(b-1) for the approximation). This links the step size directly to the crest factor — for spikier data (higher κ), the step size must be larger to accommodate the peak.

  3. Compute MSE ratio: E[||X - X_q||²] / E[||X||²] ≈ (g·Δ²/12) / (g·σ²) = Δ²/(12σ²) = (ρ·κ)²/(12Q²).

  4. Convert to dB: Taking -10 log_10 of this ratio and substituting Q ≈ 2^(b-1) gives 4.78 + 6.02b - 20 log_10(ρ) - 20 log_10(κ).

Why this form — interpretation of terms:

  • 4.78 + 6.02b: the baseline QSNR for a b-bit uniform quantizer with ideal scaling (ρ = 1, κ = 1). Each additional bit adds approximately 6.02 dB — doubling the number of quantization levels quarters the MSE. With b = 8, this term alone gives approximately 52.9 dB.
  • -20 log_10(ρ): the penalty from using a power-of-two scale factor that is up to 2× larger than ideal. At worst (ρ ≈ 2), this subtracts ~6.02 dB. At best (ρ ≈ 1), it subtracts 0 dB.
  • -20 log_10(κ): the penalty from the block-local dynamic range. For κ = 7.55 (the 8-bit crossover point in Figure 3), this subtracts ~17.6 dB. For κ = 2.96 (the observed 75th percentile at block size 32 without rotation), it subtracts ~9.4 dB. The penalty grows with larger block sizes (larger κ) and is the primary mechanism driving the granularity dependence.

The E4M3 scale variant (floor of the formula) replaces the ρ penalty with a +10 log_10(g/(g-1)) bonus because the high-precision E4M3 scale avoids the power-of-two overhead and the block maximum maps with near-zero error (it hits the codebook's maximum exactly), so only g-1 elements contribute to the error budget rather than g.

Theorem 2: FP QSNR.

QSNRFP{10log10(αMwnorm+β(ρκ)2psub),UE8M0 scale10log10(αM(wnormκ2g)+βκ2psub),E4M3 scale\text{QSNR}_{\text{FP}} \approx \begin{cases} -10 \log_{10}\left(\alpha_M w_{\text{norm}} + \beta(\rho\kappa)^2 p_{\text{sub}}\right), & \text{UE8M0 scale} \\[6pt] -10 \log_{10}\left(\alpha_M\left(w_{\text{norm}} - \frac{\kappa^2}{g}\right) + \beta\kappa^2 p_{\text{sub}}\right), & \text{E4M3 scale} \end{cases}

where:

  • α_M = 1 / (24 · 2^(2M)) is the mantissa resolution term, determined solely by the mantissa bit width M.
  • β = 2^(2(1-B-M)) / (12 · Q_max²) is the subnormal error coefficient, where B is the exponent bias and Q_max is the largest finite normal magnitude.
  • w_norm = E[X² · 𝟙_{|X| ≥ T_N}] / σ² is the fraction of the signal energy that falls in the normal (non-subnormal) region, where T_N = s' · 2^(1-B) is the boundary between normal and subnormal values.
  • p_sub = P(|X| < T_N) is the probability that a value is encoded as subnormal.
  • κ is the crest factor, g is the block size, and ρ is the scale overhead.

What it computes: the predicted QSNR in decibels for an FP(E, M, B) format as a function of the crest factor κ. The QSNR depends on how much of the data distribution falls into the normal region (where the error is relative and mantissa-limited) versus the subnormal region (where the error is absolute and step-size-limited).

Derivation walkthrough (from Appendix B.3). The proof splits the FP error into two regimes:

  1. Normal region (|X| ≥ T_N): The local effective quantization step is Δ(X) = |X| · 2^(-M) / r where r ∈ [1, 2) depends on the logarithmic phase of the scaled value. Averaging over r ~ Uniform[1, 2] gives E[1/r²] = 1/2, so the normal-region MSE is α_M · E[X² · 𝟙_{|X| ≥ T_N}] where α_M = 1/(24·2^(2M)). This means the relative error in the normal region is constant, determined only by the mantissa width.

  2. Subnormal region (|X| < T_N): The spacing is constant at Δ_sub = s' · 2^(1-B-M) = s' · S_min. The MSE contribution is Δ_sub²/12 · p_sub = β · (ρκ)²σ² · p_sub where β = 2^(2(1-B-M))/(12·Q_max²). This means the absolute error in the subnormal region grows with the scale factor (and therefore with κ).

Summing the two contributions and normalizing by σ² gives the expression inside the logarithm.

Why this form — interpretation of terms:

  • α_M · w_norm: the mantissa-limited relative error. In the ample dynamic range regime where w_norm ≈ 1 and p_sub ≈ 0, the QSNR simplifies to 13.80 + 6.02M dB, which is independent of block granularity and κ. This is FP's key advantage: with sufficient exponent range, the QSNR is a pure function of mantissa bits. For E4M3 (M = 3), this gives ~31.8 dB.
  • β(ρκ)² · p_sub: the subnormal penalty. As κ increases, more of the distribution falls below T_N (since T_N is fixed relative to s', and larger κ means larger s' for a given σ), causing p_sub to grow. The penalty scales quadratically with κ, which is why FP QSNR degrades sharply once subnormals become significant — visible in the downward slope of FP curves at high κ in Figure 3.
  • The E4M3 variant subtracts κ²/g from w_norm because the block maximum maps to Q_max with near-zero error when using a high-precision scale, so its energy should be excluded from the normal-region error budget. This gives a slight accuracy improvement over the UE8M0 formula.

Crossover point prediction. The theoretical QSNR curves in Figure 3 are generated by evaluating Theorem 1 and Theorem 2 for each format across a range of κ values, using ρ = 1.5 to model UE8M0 scale overhead, and the format-specific parameters from Table 1 (Q_max, B, M). The crossover points (where the INT and FP curves intersect) are:

  • MXINT8 vs. MXFP8: κ = 7.55, with both achieving ~31.86 dB at this point.
  • MXINT6 vs. MXFP6: κ = 1.96, with both at ~31.54 dB.
  • MXINT4 vs. MXFP4: κ = 2.04, with both at ~19.14 dB.
  • NVINT4 vs. NVFP4: κ = 2.39, with both at ~21.14 dB.

The large gap between the 8-bit and sub-8-bit crossover κ values explains the paper's central empirical finding: at block size 32, the observed κ distribution (75th percentile ~2.96 without rotation) is well below 7.55 (MXINT8 wins comfortably) but above 1.96 and 2.04 (MXINT6 and MXINT4 lose to their FP counterparts). For the NV format at block size 16, the 75th percentile κ of 2.39 sits exactly at the crossover, explaining why NVINT4 and NVFP4 have similar average QSNR (20.55 vs. 20.60). After Hadamard rotation reduces κ (75th percentile drops to 2.11), the κ distribution shifts below the crossover, and NVINT4's average QSNR jumps to 21.65 vs. NVFP4's 20.35 — a decisive reversal.


Tensor-Level Measurement Methodology

The tensor measurement pipeline bridges theory and practice by collecting real activations, weights, and gradients from an actual LLM forward-backward pass and directly computing κ and QSNR distributions.

Data collection procedure. The authors run 8 sequences of length 4096 from WikiText2 through Llama-3.1-8B (the 8-billion parameter model from Meta) in BFloat16 precision, executing both forward and backward propagation. For each of the 224 linear layers in the model, they capture six intermediate tensors corresponding to the six quantization points in Figure 1: forward activations X (①), forward weights W (②), output gradients dY (③), transposed weights W^T (④), transposed activations X^T (⑤), and weight gradient contributions dY^T (⑥). This produces 224 × 6 = 1,344 tensors per input sequence, totaling 10,752 tensors across the 8 sequences.

Crest factor computation. For each tensor, the block-wise crest factor is computed by partitioning the tensor into blocks of the target size (g = 32 for MX-style, g = 16 for NV-style), computing κ = max(|X_block|) / RMS(X_block) for each block, and then averaging across blocks to obtain a tensor-level κ. Table 2 reports the distribution (min, Q1, median, Q3, max) of these per-block crest factors across all 10,752 tensors. Critically, the reported statistics aggregate across tensor types (activations, weights, and gradients from all layers), which matters because different tensor types have different κ distributions — activations tend to have the highest κ due to outliers, while weights are typically more Gaussian due to weight decay during pretraining.

QSNR measurement. For each tensor and each format, the actual QSNR is computed directly from equation (10): the tensor is quantized and dequantized under that format with the appropriate block size and scale type, and the 10 log_10(||X||² / ||X - X_q||²) is computed. This differs from the theoretical prediction in that it uses real data (not Gaussian) and actual quantization (not the high-resolution model). Figure 4 plots these measured QSNR values against the measured κ values for each format pair.

Hadamard rotation experiments. To assess the impact of outlier mitigation, the same tensors are also processed with random Hadamard rotation before quantization. Specifically, for activation tensors with hidden dimension h, a random Hadamard matrix R of size h × h (or 32 × 32 for the block-level analysis) is applied as X_R = X·R, and the quantized computation uses Quantize(X_R) and Quantize(R^T·W) for the forward pass. Since R is orthogonal (R^T = R^(-1)), the matrix multiplication is mathematically equivalent: X·W = (X·R)·(R^T·W), but the rotation spreads outlier energy across multiple dimensions, reducing the per-element crest factor. Table 2 reports the crest factor statistics after rotation, showing that the 75th percentile κ drops from 2.96 to 2.39 for block size 32 and from 2.39 to 2.11 for block size 16.

Win rate computation. The "win rate" reported in the inset boxes of Figure 4 is computed as follows: for each of the 10,752 tensors, the QSNR under the INT format and the corresponding FP format are compared. If QSNR_INT > QSNR_FP, that tensor counts as an INT win. The win rate is the fraction of tensors where INT wins, and the reported average QSNRs are the arithmetic means across all tensors weighted equally. This is a more granular metric than per-model accuracy and reveals, for example, that NVINT4 wins 64.3% of the time (Figure 4a) despite having a slightly lower average QSNR (20.55 vs. 20.60), because NVINT4 wins on the majority of tensors but loses badly on the highest-κ tensors where its QSNR degrades faster.


Direct-Cast Inference Protocol

The inference experiments evaluate format performance at the full model level using a practical, deployment-relevant metric.

Model selection. The paper evaluates 12 open-source LLMs spanning a wide parameter range: Qwen3-0.6B, Qwen3-1.7B, Qwen3-4B, Qwen3-8B, Qwen3-14B, Qwen3-32B, Qwen3-30B-A3B (MoE), Qwen3-235B-A22B (MoE), Llama-3.2-1B, Llama-3.2-3B, Llama-3.1-8B, and Llama-3.1-70B. The selection covers both dense transformer architectures and Mixture-of-Experts, two major model families (Qwen and Llama), and a 390× parameter range. The principle for model selection is to use base (pre-trained) models when available and supervised-fine-tuned variants otherwise; the specific HuggingFace IDs are listed in Table 8.

Quantization procedure. Direct-cast inference means the pretrained BFloat16 model weights are cast (quantized) to the target low-bit format without any additional calibration, fine-tuning, or activation-aware optimizations. All forward GEMM operations use the quantized format, with both activations and weights quantized. The eight formats evaluated are listed in Table 1: MXFP8, MXINT8, MXFP6, MXINT6, MXFP4, MXINT4, NVFP4, and NVINT4, each with their corresponding block size and scale factor type. For MX formats, the UE8M0 scale is used; for NV formats, the first-level scale is E4M3 with a second-level per-tensor scale to prevent first-level overflow.

Hadamard rotation variant. For the rotation experiments, a random Hadamard matrix R of size h × h is applied, where h is the block size (32 for MX formats, 16 for NV formats). The forward computation becomes Quantize(X·R) · Quantize(R^T·W), which preserves mathematical equivalence while reducing activation outliers.

Metric: KL divergence on top-25 logits. Rather than using perplexity or accuracy alone, the paper primarily uses KL divergence to detect subtle behavioral changes that perplexity might mask (a point supported by Dutta et al., 2024). The procedure computes:

KL divergence=itop-25(BF16)piBF16log(piBF16piquantized)\text{KL divergence} = \sum_{i \in \text{top-25}(\text{BF16})} p_i^{\text{BF16}} \log\left(\frac{p_i^{\text{BF16}}}{p_i^{\text{quantized}}}\right)

where p_i are the softmax probabilities restricted to the top-25 logit indices of the BFloat16 model. By restricting to top-25, the metric focuses on the most relevant tokens and reduces noise from the long tail. The divergence is averaged over all tokens in the WikiText2 evaluation set, and the reported numbers are multiplied by 10^6 for readability. Perplexity results are also reported in Tables 14–15 as a secondary metric.

Comparison logic. For each model and format pair (e.g., MXINT8 vs. MXFP8), the format with lower KL divergence (closer to BF16 behavior) is declared the winner. A summary across all 12 models gives the "INT Win / FP Win" counts in Table 3. The paper does not claim INT is universally better — it reports exactly where INT wins and where it loses, with and without rotation.


Low-Bit Training Setup

The training experiments evaluate whether the QSNR advantages observed at inference translate to end-to-end training quality.

Models and data. Two Llama-3-style models are trained from scratch: a 1B model (16 layers, hidden size 2048, FFN size 8192, 32 attention heads, 8 KV heads) trained for 100B tokens, and a 3B model (28 layers, hidden size 3072, FFN size 8192, 24 attention heads, 8 KV heads) trained for 200B tokens. The training data is OLMo2-Mix-1124, a curated pretraining corpus. The models use Group Query Attention (GQA) for self-attention and SwiGLU activations in the feed-forward layers, following the standard Llama-3 architecture.

Training hyperparameters (Table 9). Both model sizes use: maximum learning rate 6e-4, cosine learning rate schedule with minimum LR 0.1 × max LR, AdamW optimizer with β1 = 0.9, β2 = 0.95, weight decay 0.1, gradient clipping at norm 1.0, 500 warmup steps, batch size 512 sequences of length 2048 (effective ~1M tokens per step).

Quantization during training. All six quantization operations in Figure 1 are performed during both forward and backward propagation. For the weight quantizers (② and ④), the scale factors are computed once per block and stored; for the activation and gradient quantizers (①, ③, ⑤, ⑥), the scale factors are computed dynamically during each forward/backward pass since the tensor values change with each input. The comparison is between MXFP8 (E4M3 with UE8M0 scale) and MXINT8 (symmetric [-127, 127] with UE8M0 scale, using the symmetric clipping fix). A BF16 baseline (no quantization) is also trained for reference.

Why only 8-bit training. The paper focuses on 8-bit training because prior work had already demonstrated nearly lossless FP8 training (Mishra et al., 2025; DeepSeek-V3), and the question is whether INT8 can match or exceed this. Sub-8-bit training (4-bit, 6-bit) is not evaluated because the QSNR measurements (Figure 4) already show that MXINT6 and MXINT4 lose to their FP counterparts; training with these formats would likely result in unacceptable accuracy degradation regardless of format choice.

Evaluation metrics. Training quality is assessed through two lenses:

  1. Training loss (Figure 5): the smoothed cross-entropy loss over the pretraining corpus, smoothed with an exponential moving average (coefficient 0.9) to reduce noise from per-batch variance.
  2. Downstream task accuracy (Table 4): zero-shot and few-shot accuracy on six common-sense reasoning benchmarks using lm_eval: 5-shot WinoGrande (accuracy), 5-shot HellaSwag (accuracy normalized), 5-shot ARC Challenge (accuracy normalized), 5-shot ARC Easy (accuracy normalized), 5-shot PIQA (accuracy normalized), and 5-shot OpenbookQA (accuracy normalized). The reported "Avg." is the arithmetic mean across all six tasks.

Key result from the training experiments. Figure 5 shows that the loss curves for BF16, MXFP8, and MXINT8 are nearly indistinguishable, with MXINT8 consistently achieving a loss approximately 0.001 lower than MXFP8 (visible in the zoomed insert). Table 4 confirms that downstream accuracy is preserved: the 1B MXINT8 model achieves 57.02% average accuracy (vs. 56.89% BF16, 56.86% MXFP8), and the 3B MXINT8 model achieves 64.30% (vs. 64.45% BF16, 64.05% MXFP8). These differences are within noise and demonstrate that MXINT8 training is "nearly lossless" — matching the prior FP8 training result but with an integer format that is cheaper in hardware.


Hardware Cost Modeling Framework

The hardware analysis in Section 6 and Appendix C estimates the relative area and energy consumption of Matrix-Multiply Units (MMUs) supporting different formats, enabling a direct efficiency comparison independent of algorithmic accuracy.

MMU architecture model. The MMU is modelled as a k-lane systolic array, where k = 32 for MX formats and k = 16 for NV formats (matching the block size, as is conventional in accelerator design). Each lane contains one multiplier and participates in a multi-input adder tree. The MMU is divided into sub-blocks (Table 6):

  • Multiplier: for FP, multiplies (y+1)-bit mantissas only (with one implicit leading bit); for INT, multiplies (x+y+1)-bit values where x=0 for INT (no exponent).
  • Adder (mantissa/integer): for FP, a kn-bit wide mantissa adder tree; for INT, a 2k(x+y+1)-bit integer adder tree. The FP adder tree is wider due to mantissa alignment shifting.
  • Exponent adder: kx-bit for FP (adds exponents during multiplication); not present for INT.
  • Exponent subtractor: kx-bit for FP addition (finds exponent difference for alignment); not present for INT.
  • Comparator: kx-bit for FP (compares exponents to determine which is larger for alignment); not present for INT.
  • Aligner (barrel shifter): for FP addition, a barrel shifter of width k·n·log₂(n) gates that shifts the smaller mantissa right by the exponent difference. This is the dominant area cost for FP addition and has no counterpart in INT addition.
  • Normalizer (shared): a single n·log₂(n)-gate shifter shared across all k lanes that normalizes the adder tree output to FP format. This cost is divided by k.

Aligner width computation. The aligner width n is a critical parameter that couples numerical accuracy and hardware cost:

n=min(2x+1+2y,psum_bit_width)n = \min\left(2^{x+1} + 2y, \text{psum\_bit\_width}\right)

where x is the exponent width, y is the mantissa width, and psum_bit_width = 24 (the mantissa width of FP32). For INT formats, x = 0, so the first argument becomes 2 + 2y. The aligner width determines how much the smaller mantissa can be shifted before bits fall off the right edge — larger n preserves more precision during accumulation but costs more area.

Gate-level cost aggregation. Each sub-block's logic is decomposed into standard cells (Table 6): Full Adders (FA), Half Adders (HA), XOR, AND, OR, and Multiplexers (MUX). Each cell type g has technology-dependent area A_g and energy E_g factors from a TSMC FinFET standard-cell library. The total area and energy for the MAC unit are:

AreaMAC=sSgGcs,g(x,y,k,n)Ag\text{Area}_{\text{MAC}} = \sum_{s \in S} \sum_{g \in G} c_{s,g}(x, y, k, n) \cdot A_g

EnergyMAC=sSgGcs,g(x,y,k,n)Egτg\text{Energy}_{\text{MAC}} = \sum_{s \in S} \sum_{g \in G} c_{s,g}(x, y, k, n) \cdot E_g \cdot \tau_g

where c_{s,g} is the count of cell g in sub-block s, and τ_g is the toggle rate (assumed equal across all cells for simplicity). The model additionally accounts for a shared FP32 accumulator (adding Area_ACC32 and Energy_ACC32) and a shared dequantizer (adding Area_DEQ and Energy_DEQ), whose costs are divided by k when reporting per-lane figures.

Mixed-format reuse configurations (Table 7). For chips supporting both 8-bit and 4-bit formats (like NVIDIA Blackwell, which supports MXFP8 and NVFP4), the area cost depends on how the datapaths are shared between formats. The paper evaluates:

  • No reuse: separate MAC units for 8-bit and 4-bit, with the 4-bit units having 2× more lanes to match the 2:1 throughput ratio (since 4-bit types have half the bandwidth of 8-bit types, they need 2× the compute to maintain throughput balance).
  • INT reuse scheme 2 (adopted for evaluation): two int8 × (unsigned) int4 lanes that can be reconfigured as either one INT8 lane or two INT4 lanes by setting the 8-bit input to XXXX_0000 for INT4 operation. This has slightly higher energy per operation (due to the wider datapath running at partial utilization) but the lowest area cost due to hardware sharing.
  • FP reuse scheme (adopted for evaluation): one FP8 lane that can also serve as an FP4 path by setting the 8-bit input to S_00XX_X00 (zeroing unused mantissa and exponent bits). Similar energy-area trade-off to the INT reuse scheme.

Results interpretation (Table 5). The reported "Energy" and "Area" numbers are normalized to MXFP8 for single-format comparisons and to "MXFP8 + NVFP4" for mixed-format comparisons. For single formats, MXINT8 uses 0.63× the energy and 0.79× the area of MXFP8 — the energy savings (37%) come primarily from eliminating exponent addition, comparison, and alignment logic. NVINT4 uses 0.34× the energy and 0.38× the area of NVFP4 — larger savings than 8-bit because at 4 bits, the FP overhead (exponent handling, alignment) represents a larger fraction of total cost relative to the narrower datapath. For mixed-format configurations, "MXINT8 + NVINT4" achieves 0.75× energy and 0.66× area relative to "MXFP8 + NVFP4" — the 34% area reduction reflects simpler circuit reuse in the INT pipeline, since INT datapaths can be reconfigured to handle different bit widths with simpler masking logic than FP datapaths, which require format-specific exponent/mantissa decomposition.

4. Key Insights and Innovations

Innovation 1: The Crest Factor as the Single Sufficient Statistic for the INT-vs-FP Trade-off

Prior to this work, the comparison between integer and floating-point quantization was treated as a format preference driven by heuristics — FP handles outliers better, INT is simpler to implement — without a unifying analytical framework that could predict when each format would dominate. Industry had largely settled on an FP-first approach (OCP MX specifications, NVIDIA Blackwell's native FP8/FP4 support) based on the reasonable intuition that floating-point dynamic range is essential for LLM activations with their notorious outliers. But this intuition was never formalized into a testable theory that could identify the precise conditions under which INT overtakes FP.

The paper's central conceptual contribution is identifying the block-local crest factor κ (the ratio of peak absolute value to RMS within a quantization block) as the single distributional property that governs the INT-vs-FP trade-off. This is not merely a useful metric — it is a genuine theoretical unification. Theorems 1 and 2 express the QSNR of both format families as functions of κ (and format parameters), enabling quantitative crossover prediction rather than post-hoc empirical comparison. The insight is that κ captures exactly what matters: FP encodes values with relative error (mantissa-limited), which makes it insensitive to κ in the normal region but vulnerable to subnormal degradation when κ grows large; INT encodes values with absolute error (step-size-limited), which makes it uniformly penalized by κ through the scaling factor. The crossover occurs at the κ where these two error-growth curves intersect.

This is a fundamental diagnostic advance, not an incremental refinement. By reducing a complex, multi-factor comparison (bit width, exponent bits, mantissa bits, block size, scale format, data distribution) to a single scalar that can be measured on any model, the paper gives the community a transferable, theory-grounded tool for making format decisions without running exhaustive benchmarks on every new architecture. The theoretical predictions (crossover at κ = 7.55 for 8-bit MX, κ = 2.39 for 4-bit NV) are validated against 10,752 real tensors from a production LLM (Figure 4), and the match between theory and measurement is close enough to make the framework predictive rather than merely descriptive. Figure 3 is the paper's signature contribution: it condenses the entire INT-vs-FP comparison into four curves with annotated crossover points, providing a visual intuition that the text developments make rigorous.

What distinguishes this from prior analytical work on quantization error (Bennett, 1948; the high-resolution model widely used in signal processing) is that the FP analysis in Theorem 2 properly separates normal-region error (relative, mantissa-bound) from subnormal-region error (absolute, step-size-bound) and expresses both in terms of κ, without assuming that the data stays entirely in the normal regime. This is the non-obvious part: FP's vaunted dynamic range only provides its theoretical QSNR ceiling when subnormals are rare, and κ directly controls subnormal probability. The theory reveals that FP's advantage is conditional, not absolute.

Innovation 2: The Granularity Crossover as a Resolution of Conflicting Intuitions

The quantization literature contained an unresolved tension that this paper diagnoses and resolves. On one hand, coarse-granularity studies and the hardware industry's trajectory both favored floating-point formats — FP8 at per-tensor or per-channel granularity clearly outperforms INT8 because the wide dynamic range within a channel (crest factors of 10–60, per Table 2) keeps FP's relative-error advantage decisive. On the other hand, the move toward block-wise quantization (OCP MX with block size 32, NVIDIA NV with block size 16) was motivated by the observation that finer granularity improves accuracy for any format by confining outliers to their own scaling groups. The implicit assumption was that FP would benefit from fine granularity in the same way INT does, preserving FP's relative advantage.

The paper's second major conceptual move is showing that finer granularity shrinks κ systematically, and this shrinkage benefits INT more than it benefits FP, to the point of reversing the format hierarchy at 8 bits. This is non-obvious because it is not about either format improving in absolute terms — both do — but about their relative improvement rates as block size decreases. FP's QSNR is mantissa-bound in the ample dynamic range regime (equation 41: 13.80 + 6.02M dB), meaning finer granularity does not improve FP QSNR once κ is small enough that subnormals are rare. INT's QSNR, by contrast, improves continuously as κ decreases (equation 25: the -20 log_10(κ) term shrinks). The result is that at some granularity, INT crosses above FP — and for 8-bit formats, that granularity (block size ~32) is exactly what the hardware industry has already adopted.

This insight reframes the entire conversation around quantization granularity. Fine-grained scaling is not just "better accuracy for everyone" — it changes which format family is optimal. Prior work (Darvish Rouhani et al., 2023; the OCP MX specification) treated fine granularity as orthogonal to format choice; this paper demonstrates they are deeply coupled. The empirical confirmation is striking: at block size 32 with no outlier mitigation, MXINT8's QSNR averages 40.35 dB versus MXFP8's 31.50 dB (Figure 4a), and MXINT8 wins on all 12 evaluated models (Table 3). This is not a marginal victory — it is an ~8.85 dB advantage, representing approximately 2.8× better signal preservation in terms of MSE ratio (every ~3 dB halves the error power).

The granularity-crossover concept also explains the apparently contradictory results in prior literature. Zhang et al. (2024) found mixed results when comparing INT and FP, with format preference depending on the specific layer — their study operated at coarser granularities where the crossover had not been crossed for most tensors. The coarse-granularity FP advantage and fine-granularity INT advantage are not contradictory; they are two regions of the same κ-dependent trade-off curve, unified by the theory this paper provides.

Innovation 3: Symmetric Clipping as a Critical Enabler for INT Training

The paper's third contribution is more specific than the first two but equally important for practical adoption. Prior work on low-bit training had focused almost exclusively on floating-point formats — FP8 training is the established near-lossless baseline (Mishra et al., 2025; DeepSeek-V3), and FP4 training is the active frontier (Tseng et al., 2025; Castro et al., 2025). INT training at fine granularity was largely unexplored, and the paper identifies why: there is a subtle but severe failure mode that would lead any researcher who tried naive INT8 training to conclude it is inferior.

The failure mode is the asymmetric integer range of two's complement representation. Standard signed integers encode [-2^(b-1), 2^(b-1)-1], giving one more negative value than positive values. For inference, this asymmetry is mostly harmless — a slight bias in the quantization error on a small fraction of values does not materially affect the forward pass. But for training, where gradients are accumulated across many steps and the quantization error feeds back through the backward pass, the persistent negative bias compounds. Figure 2 demonstrates this concretely: at block size 32 with BFloat16 scale factors, asymmetric [-128, 127] produces a final training loss of 3.1354, while symmetric [-127, 127] produces 3.1251 — a 0.01 improvement in loss that would meaningfully affect training quality at scale.

What makes this insight diagnostic rather than merely a fix is the paper's analysis of why the problem is worse at finer granularity (Table 10). With more blocks, proportionally more tensors have a value that maps to the unique negative extreme Q_min = -128. Furthermore, Appendix D.2 reveals a compounding numerical issue: BFloat16 arithmetic precision causes 16.82% of values to map to -128 even when the scale factor is designed to map to 127, because the division X/s' in BFloat16 loses precision at the boundary (Algorithm 1, Table 11). This means the asymmetry problem is not just statistical but numerical — it is baked into the floating-point arithmetic used to compute the quantization mapping itself.

The symmetric clipping fix itself is simple — discard one integer code to make the range symmetric — but the contribution is in identifying that this is necessary for training and demonstrating that it enables nearly lossless INT8 training that matches FP8 (Figure 5, Table 4). The 1B and 3B training results show MXINT8 achieving loss curves that overlay BF16 and consistently outperform MXFP8 by approximately 0.001 in loss, with downstream accuracy within 0.01 of BF16 across six reasoning tasks. This is a fundamental enabler, not an incremental improvement: without this fix, the INT-vs-FP training comparison would misleadingly favor FP, and the paper's broader argument for INT formats in hardware would lack training evidence.

The significance extends beyond this paper's results. The finding suggests that any future work on INT training — at 4 bits, 6 bits, or with different quantizer designs — must account for the asymmetric-range bias. More broadly, it surfaces a general principle: numerical precision in the quantization arithmetic itself (the BFloat16 divisions and multiplications used to compute scales and map values) can be a hidden failure mode that standard high-resolution quantization theory (which assumes infinite-precision arithmetic) misses.

Innovation 4: The Hardware Cost Asymmetry as an Independent Justification for INT

The paper's fourth insight operates at the algorithm-hardware boundary and challenges a common assumption in the quantization literature: that hardware efficiency follows trivially from bit width. Most papers treat "lower bit width = more efficient" as a given and focus exclusively on algorithmic accuracy. This paper's gate-level hardware analysis (Appendix C, Table 5) reveals that at the same bit width, INT formats are significantly cheaper in hardware than FP formats, and the savings are not marginal — MXINT8 uses 37% less energy and 21% less area than MXFP8, while NVINT4 uses 38% less energy and 30% less area than NVFP4, all at matched throughput.

The conceptual novelty here is in decomposing why INT is cheaper, which is not simply "FP is more complex." The analysis (Table 6) reveals a specific asymmetry: FP multipliers are actually more area-efficient than INT multipliers at the same nominal bit width (because FP multiplies only mantissas while INT must multiply the full integer including sign-extended range bits), but FP adders are substantially more expensive than INT adders due to exponent comparison, mantissa alignment via barrel shifters, and normalization logic. The net hardware cost depends on the relative weight of multiplication versus addition in the MMU datapath, which itself depends on the lane count k and the aligner width n (equation 44). For the lane counts and aligner widths typical of low-precision GEMM engines (k = 32 for MX, k = 16 for NV), the addition overhead dominates, making the INT datapath net-cheaper.

This is a reframing contribution: it changes the hardware efficiency question from "which format uses fewer bits?" (where INT and FP at the same bit width are equivalent) to "which format requires less logic per operation at a given bit width?" (where INT wins). It also provides concrete, quantified relative costs (Table 5) that hardware architects can use in design-space exploration, rather than the hand-wavy "FP is more expensive" that appears in most algorithm papers.

The mixed-format analysis adds a further layer: the 34% area reduction for "MXINT8 + NVINT4" versus "MXFP8 + NVFP4" (Table 5) is driven not just by per-format savings but by simpler circuit reuse in the INT pipeline (Table 7). An INT8 datapath can be reconfigured to handle INT4 by masking the upper bits of the input; an FP8 datapath reconfigured for FP4 must handle the different exponent/mantissa field layouts and alignment requirements, which adds multiplexing and control logic. This argument has implications beyond the specific formats studied — it suggests that a hardware platform designed around INT formats would have an easier time supporting multiple precisions, which is increasingly important as mixed-precision training and inference become standard.

Innovation 5: Hadamard Rotation as a Format-Agnostic Outlier Mitigator That Shifts the Crossover

The paper's final conceptual contribution is demonstrating that Hadamard rotation does not just improve quantization accuracy in general — it changes the INT-vs-FP comparison by systematically reducing κ and thereby shifting tensors across the format crossover threshold. This is more specific and consequential than the well-known observation that rotation reduces outliers (Ashkboos et al., 2024; QuaRot). The key insight is that rotation's effect on the format comparison depends on where the unrotated κ distribution sits relative to the crossover κ.

For 8-bit formats, the unrotated κ distribution (75th percentile 2.96, Table 2) is already far below the crossover (7.55, Figure 3), so rotation improves both MXINT8 and MXFP8 but does not change which format wins — MXINT8 dominates before and after rotation (Table 3, 12/12 wins in both cases). For 4-bit NV formats, the situation is qualitatively different: the unrotated κ distribution (75th percentile 2.39) sits exactly at the crossover (2.39), creating a near-tie (64.3% INT win rate, Figure 4a). Rotation pushes the 75th percentile κ down to 2.11, which is below the crossover, and the win rate flips to 99.3% for NVINT4 (Figure 4b) — a decisive reversal. The NVFP4 QSNR actually decreases from 20.60 to 20.35 after rotation (Figure 4a vs. 4b), which is initially surprising but consistent with the theory: when κ < 4, NVFP4's QSNR increases with κ (as predicted by equation 43, where the -κ²/g term in the normal region and the +κ²·p_sub term in the subnormal region have opposing signs), so reducing κ through rotation actually hurts FP4 at these low κ values while helping INT4 unconditionally.

This is a conceptually elegant finding because it shows that outlier mitigation and format selection are coupled decisions. An algorithm designer choosing between INT and FP should not ask "which format is better?" in the abstract, but "what is the κ distribution of my data after any outlier mitigation I plan to apply?" The crossover framework provides the analytical tool to answer this question: measure κ (with and without rotation), compare to the format-specific crossover thresholds from Figure 3, and select accordingly. This is actionable guidance that emerges directly from the theoretical framework, not from empirical trial-and-error.

The broader significance is that it positions Hadamard rotation — and potentially other outlier mitigation techniques (SmoothQuant, QuaRot, SpinQuant) — as not just accuracy-improving but format-decision-changing. For 4-bit quantization, where the accuracy margins are tight, the choice of whether to apply rotation can determine whether INT or FP is the optimal format. This coupling between mitigation strategy and format choice had not been articulated in prior work, which treated rotation as a generic accuracy booster orthogonal to format selection.

5. Experimental Analysis

Evaluation Methodology

  • Dataset. For tensor-level analysis (Section 5.1), the authors use 8 sequences of length 4096 from WikiText2 (Merity et al., 2016), processed through Llama-3.1-8B in BFloat16 precision during both forward and backward propagation, capturing all intermediate tensors. For direct-cast inference (Section 5.2), WikiText2 is also used for KL divergence computation. For low-bit training (Section 5.3), the training corpus is OLMo2-Mix-1124 (Team OLMo et al., 2024), a curated pretraining dataset, with 100B tokens for the 1B model and 200B tokens for the 3B model.

  • Base model(s). The tensor-level analysis uses Llama-3.1-8B (Meta) with 224 linear layers, producing 10,752 tensors (6 tensor types × 224 layers × 8 sequences). Direct-cast inference evaluates 12 open-source models spanning 0.6B to 235B parameters: Qwen3-0.6B, Qwen3-1.7B, Qwen3-4B, Qwen3-8B, Qwen3-14B, Qwen3-32B, Qwen3-30B-A3B (MoE), Qwen3-235B-A22B (MoE) [42], Llama-3.2-1B, Llama-3.2-3B, Llama-3.1-8B, and Llama-3.1-70B [13]. These families were chosen to span dense and Mixture-of-Experts architectures from two major model lineages with a 390× parameter range, testing format generalizability. Low-bit training uses Llama-3-style 1B and 3B models (architectures in Table 9) trained from scratch.

  • Metrics. Three metric categories serve different analysis layers: (1) QSNR (dB) — the quantization signal-to-noise ratio defined as -10 log_10(||X - X_q||² / ||X||²), measured per-tensor on real LLM data to validate theoretical predictions; (2) KL divergence (×10^6) — Kullback-Leibler divergence between quantized and BF16 models' softmax distributions, restricted to the top-25 logits of the BF16 model to focus on high-confidence tokens and reduce noise from the long tail, averaged over all WikiText2 tokens; (3) Training loss and downstream accuracy — cross-entropy loss smoothed with exponential moving average (coefficient 0.9), plus 5-shot accuracy on WinoGrande, HellaSwag, ARC Challenge, ARC Easy, PIQA, and OpenbookQA using lm_eval, with the arithmetic mean across all six tasks reported as "Avg." For direct-cast inference, perplexity on WikiText2 is also reported (Tables 14–15) as a secondary metric.

  • Baselines. The primary comparison framework is head-to-head INT vs. FP at matched bit widths and granularities, making BF16 the implicit accuracy ceiling. For direct-cast inference, eight formats serve as mutual baselines: MXFP8, MXINT8, MXFP6, MXINT6, MXFP4, MXINT4, NVFP4, and NVINT4 (all defined in Table 1), with BF16 as the reference for KL divergence computation. For low-bit training, BF16 training without quantization provides the accuracy baseline, with MXFP8 as the prior state-of-the-art low-bit training format (following Mishra et al., 2025 and DeepSeek-V3's demonstrated near-lossless FP8 training).

  • Generation budget / compute accounting. This is not a generation-budget paper — it is a format-comparison paper. The relevant accounting is: (1) Tensor-level: 10,752 tensors from 8 × 4096-token sequences, each quantized under multiple formats with block-wise AbsMax scaling; (2) Inference: one full forward pass per model per format, with KL divergence computed on WikiText2; (3) Training: 100B tokens (1B model) and 200B tokens (3B model) with all six quantization operations in Figure 1 active, representing approximately 52,400 and 104,800 training steps respectively (batch size 512 × sequence length 2048). For hardware cost, the accounting is at the gate level: area and energy are estimated per MMU lane and normalized to MXFP8, with lane counts k = 32 for MX formats and k = 16 for NV formats.

  • Cross-validation / statistical protocol. No cross-validation is used — the analysis is deterministic given the model, data, and format. For the tensor-level win rate statistics (Figure 4 inset boxes), each of the 10,752 tensors is an independent data point, and the win rate is the fraction of tensors where QSNR_INT > QSNR_FP. For the direct-cast inference comparison (Table 3), each of the 12 models is treated as an independent evaluation, and the "INT Win / FP Win" count simply tallies which format produces lower KL divergence per model. Error bars or confidence intervals are not reported, which is a limitation of the analysis.


Main Quantitative Results

Tensor-Level Crest Factor and QSNR Analysis

Crest factor distributions establish the baseline for format comparison. Table 2 reports crest factor statistics for channel-wise (block size -1), MX-format (block size 32), and NV-format (block size 16) quantization, both with and without Hadamard rotation. The key statistic is the 75th percentile (Q3), which represents typical worst-case behavior:

  • Channel-wise (no block): Q3 = 11.97 without rotation, 5.79 with rotation. These values are far above the MXINT8 vs. MXFP8 crossover threshold of κ = 7.55 (Figure 3), confirming that FP dominates INT at coarse granularities — the wide dynamic range within a channel requires FP's relative-error encoding.
  • Block size 32 (MX): Q3 = 2.96 without rotation, 2.39 with rotation. The unrotated Q3 of 2.96 is far below the 8-bit crossover of 7.55 (MXINT8 should dominate MXFP8) but above the 6-bit and 4-bit crossover thresholds of 1.96 and 2.04 (MXINT6 and MXINT4 should lose to their FP counterparts). After rotation, Q3 drops to 2.39, which remains below 7.55 but still above 1.96 and 2.04 — the predictions for 6-bit and 4-bit do not change.
  • Block size 16 (NV): Q3 = 2.39 without rotation, 2.11 with rotation. The unrotated Q3 equals the NVINT4 vs. NVFP4 crossover threshold of κ = 2.39 exactly (Figure 3), predicting a near-tie. After rotation, Q3 drops to 2.11, moving below the crossover threshold and predicting NVINT4 dominance.

Measured QSNR validates theoretical crossover predictions. Figure 4 plots the measured QSNR against measured crest factor for each of the 10,752 tensors, comparing INT and FP variants. The inset boxes report average QSNR and win rates:

Without Hadamard rotation (Figure 4a):

  • MXINT8 vs. MXFP8: MXINT8 average QSNR = 40.35 dB vs. MXFP8 = 31.50 dB. MXINT8 wins 100% of tensors. The ~8.85 dB advantage corresponds to roughly 2.8× better signal preservation in terms of MSE ratio. MXFP8's QSNR is nearly flat across κ values at ~31.5 dB, consistent with Theorem 2's prediction that in the ample dynamic range regime (M = 3 mantissa bits), QSNR ≈ 13.80 + 6.02 × 3 ≈ 31.86 dB independent of κ.
  • MXINT6 vs. MXFP6: MXINT6 = 28.57 dB vs. MXFP6 = 30.39 dB. MXINT6 wins only 0.1% of tensors. MXFP6 shows the same ~30–31 dB QSNR ceiling as MXFP8 at low κ (both have M = 3 mantissa bits), but degrades at higher κ due to subnormal probability increasing — this is visible in the downward slope of the FP6 points at κ > 2.5–3.0.
  • MXINT4 vs. MXFP4: MXINT4 = 15.89 dB vs. MXFP4 = 17.98 dB. MXINT4 wins 0.3% of tensors.
  • NVINT4 vs. NVFP4: NVINT4 = 20.55 dB vs. NVFP4 = 20.60 dB. NVINT4 wins 64.3% of tensors despite a slightly lower average QSNR, because NVINT4's QSNR degrades faster than NVFP4's as κ increases — it wins on the majority of tensors (where κ is relatively low) but loses badly on the highest-κ tensors, pulling its average down. The near-tie is consistent with the unrotated Q3 of 2.39 matching the crossover threshold exactly.

With Hadamard rotation (Figure 4b):

  • MXINT8 vs. MXFP8: MXINT8 = 41.93 dB vs. MXFP8 = 31.51 dB. MXINT8 wins 100% — rotation improves both formats but does not change the winner.
  • MXINT6 vs. MXFP6: MXINT6 = 30.18 dB vs. MXFP6 = 31.03 dB. MXINT6 wins 5.5% of tensors — rotation helps INT6 (from 28.57 to 30.18 dB, +1.61 dB) but not enough to surpass FP6 (30.39 to 31.03 dB, +0.64 dB), because rotation pushes κ below the MXFP6 QSNR ceiling region where FP maintains its advantage.
  • MXINT4 vs. MXFP4: MXINT4 = 17.22 dB vs. MXFP4 = 18.79 dB. MXINT4 wins 1.3% — the gap narrows from ~2.1 dB to ~1.6 dB, but FP4 remains superior.
  • NVINT4 vs. NVFP4: NVINT4 = 21.65 dB vs. NVFP4 = 20.35 dB. NVINT4 wins 99.3% of tensors — a decisive reversal from the 64.3% win rate without rotation. This is the paper's headline 4-bit result. The reversal occurs not just because NVINT4 improves (20.55 → 21.65 dB, +1.10 dB), but because NVFP4 degrades (20.60 → 20.35 dB, −0.25 dB). This degradation is consistent with Figure 3's theoretical curves, where NVFP4's QSNR increases with κ when κ < 4 — the normal-region error term (−κ²/g in equation 43) dominates in this regime, so reducing κ through rotation paradoxically decreases FP4's QSNR. The rotated Q3 of 2.11 places the majority of tensors below the NVINT4-vs-NVFP4 crossover threshold of 2.39, enabling INT4 to win.

Direct-Cast Inference Across 12 Models

Table 3 summarizes the format comparison at the full-model level. The comparison metric is KL divergence on WikiText2 (lower is better, indicating closer match to BF16 behavior):

Without Hadamard rotation:

  • MXINT8 vs. MXFP8: MXINT8 wins on all 12 models (INT Win: 12, FP Win: 0). This is the most robust result in the paper — not a single model across the 0.6B to 235B range, across dense and MoE architectures, across Qwen and Llama families, shows FP8 outperforming INT8. The consistency is notable because per-model KL divergence varies substantially (e.g., Tables 12–13 show MXINT8 KL ranging from 77 to 276 while MXFP8 ranges from 300 to 579), but the ordering is uniform.
  • MXINT6 vs. MXFP6: MXINT6 loses on all 12 models (INT Win: 0, FP Win: 12). The narrower dynamic range at 6 bits hits INT harder, consistent with the 0.1% tensor-level win rate in Figure 4a.
  • MXINT4 vs. MXFP4: MXINT4 loses on all 12 models (INT Win: 0, FP Win: 12). FP4's advantage is decisive — KL divergences for MXINT4 range from 13,248 to 39,936 (Table 12) while MXFP4 ranges from 6,194 to 17,602, a factor of ~2× difference.
  • NVINT4 vs. NVFP4: NVINT4 loses on all 12 models (INT Win: 0, FP Win: 12). Despite the 64.3% tensor-level win rate, the model-level KL divergence favors NVFP4, because the worst-case tensors (where NVINT4 loses badly at high κ) have disproportionate impact on model output — the near-tie at the tensor level translates to an FP win at the model level.

With Hadamard rotation:

  • MXINT8 vs. MXFP8: MXINT8 wins on all 12 models (unchanged).
  • MXINT6 vs. MXFP6: MXINT6 wins on 1 model and loses on 11 (INT Win: 1, FP Win: 11). The 1 model where INT6 wins corresponds to the 5.5% tensor-level win rate — most individual tensors still favor FP6, and only one model's aggregate KL divergence flips. This is consistent with rotation helping INT6 more than FP6 but not enough to change the overall ordering for most models.
  • MXINT4 vs. MXFP4: MXINT4 loses on all 12 models (unchanged). Rotation helps both formats but the FP4 advantage is too large to reverse.
  • NVINT4 vs. NVFP4: NVINT4 wins on all 12 models (INT Win: 12, FP Win: 0). This is the second major empirical result: rotation flips the 4-bit comparison from a clean FP4 sweep to a clean INT4 sweep. The mechanism is the same as at the tensor level — rotation pushes κ below the 2.39 crossover threshold, where INT4's uniform precision dominates over FP4, and the NVFP4 QSNR actually degrades slightly due to the κ < 4 regime's inverse relationship.

Perplexity results confirm KL divergence trends. Tables 14–15 report WikiText2 perplexity for all models and formats. The perplexity rankings are consistent with KL divergence: for example, Qwen3-8B with MXINT8 achieves perplexity 6.5174 vs. MXFP8's 6.5444 (without rotation), and with rotation, NVINT4 achieves 7.1705 vs. NVFP4's 7.5084 — consistent with the INT format producing output distributions closer to BF16.


Low-Bit Training: MXINT8 vs. MXFP8

Figure 5 shows training loss curves for BF16, MXFP8, and MXINT8 on the Llama-1B model trained for 100B tokens. The three curves are nearly indistinguishable at the macro scale, with MXINT8 consistently achieving a loss approximately 0.001 lower than MXFP8 (visible in the zoomed insert). This is a significant result: it demonstrates that INT8 training, with the symmetric clipping fix, matches or slightly exceeds the prior FP8 training baseline that had been established as near-lossless (Mishra et al., 2025; Liu et al., 2024).

Table 4 reports final training loss and downstream task accuracy for both 1B (100B tokens) and 3B (200B tokens) models. For the 1B model:

  • BF16 baseline: loss 2.6727, average accuracy 56.89%.
  • MXFP8: loss 2.6767 (−0.0040 vs. BF16), accuracy 56.86% (−0.03).
  • MXINT8: loss 2.6758 (−0.0031 vs. BF16), accuracy 57.02% (+0.13).

For the 3B model:

  • BF16 baseline: loss 2.4794, average accuracy 64.45%.
  • MXFP8: loss 2.4821 (−0.0027 vs. BF16), accuracy 64.05% (−0.40).
  • MXINT8: loss 2.4812 (−0.0018 vs. BF16), accuracy 64.30% (−0.15).

The key pattern is that MXINT8's loss is consistently lower than MXFP8's (by ~0.0009 for 1B, ~0.0009 for 3B), and accuracy differences across all three training configurations are within ±0.4 percentage points — well within the noise expected from training stochasticity and evaluation variance. This establishes that MXINT8 supports nearly lossless low-bit training, matching the quality previously demonstrated only for FP8.


Ablation Studies and Robustness Checks

Symmetric vs. asymmetric integer clipping for training (Figure 2, Table 10): The paper demonstrates that asymmetric INT8 range [-128, 127] degrades training loss compared to symmetric [-127, 127]. On a 145M model trained for 20B tokens at block size 32 with BFloat16 scale factors, asymmetric clipping produces loss 3.1354 vs. symmetric 3.1251 — a meaningful 0.0103 difference. The asymmetry penalty is worse at finer granularities: at block size 256, asymmetric loss is 3.1340 (only ~0.0037 worse than symmetric at that granularity), but at block size 32, the gap widens to 0.0103, and at per-channel granularity, asymmetric is actually slightly better (3.2544 vs. 3.2560) because the unique negative extreme affects proportionally fewer tensors. The effect is present but milder when using UE8M0 scale factors (Table 10, right columns) because the rounded-up UE8M0 scale is always ≥ the ideal BFloat16 scale, meaning fewer values map to the negative extreme. The BFloat16 numerical stability analysis (Table 11) reveals the underlying mechanism: 16.82% of values map to −128 even with a scale designed for [-127, 127] because BFloat16 division precision drops bits near the boundary, making symmetric clipping a numerical necessity, not merely a statistical preference.

UE8M0 scale rounding direction (Equation 9 vs. Equation 8): The paper follows prior work in rounding up UE8M0 scales rather than the OCP specification's round-down convention. This avoids additional upper-clipping error at the cost of up to ~6 dB in QSNR overhead (the −20 log_10(ρ) term in Theorem 1). The choice is justified implicitly by the strong empirical results (MXINT8 achieving 40.35 dB average QSNR and winning 12/12 inference comparisons), but no direct ablation comparing round-up vs. round-down for UE8M0 is presented. This is a reasonable omission given that prior work (Chen et al., 2025; Mishra et al., 2025; Tseng et al., 2025) has already established round-up as the standard practice.

Hadamard rotation block size: The rotation experiments use block-size-matched Hadamard matrices: 32 × 32 for MX formats and 16 × 16 for NV formats. This choice means rotations within each quantization block are independent — the rotation matrix is applied per-block rather than across the full hidden dimension. This is a practical design choice (full-dimension rotations are expensive) but no ablation comparing block-level vs. full-dimension rotation is presented. The block-level rotation's effectiveness (reducing Q3 κ from 2.96 to 2.39 at block size 32, from 2.39 to 2.11 at block size 16) suggests it is sufficient for the format comparison, but full-dimension rotation might provide additional κ reduction.

Format-specific ablation: PRM aggregation, ORM vs. PRM, revision verifier — NOT APPLICABLE. This paper does not involve PRM/ORM verifiers, revision models, or answer selection strategies. The ablations are about quantization hyperparameters (symmetric clipping, scale format, rotation presence) rather than search/revision mechanisms.

Negative result: MXINT6 and MXINT4 do not benefit enough from rotation to surpass FP counterparts: Even with Hadamard rotation, MXINT6 wins only 5.5% of tensor-level comparisons and 1 of 12 model-level comparisons (Table 3). MXINT4 wins only 1.3% of tensor-level comparisons and 0 of 12 models. This negative result is informative: it demonstrates that the INT advantage over FP at fine granularity is not universal — it depends on the bit width and the position of the κ distribution relative to the format-specific crossover threshold. At 6 and 4 bits, the crossover κ values (1.96 and 2.04) are so low that even after rotation (Q3 drops to ~2.3–2.4), the bulk of the κ distribution remains above the threshold. This means that for sub-8-bit quantization, FP formats retain a genuine advantage that rotation cannot overcome, at least at the block sizes studied (32 for MX).

Negative result: NVFP4 QSNR degrades under rotation: NVFP4's average QSNR drops from 20.60 dB to 20.35 dB after rotation (Figure 4a vs. 4b). This is consistent with the theoretical prediction (Figure 3) that NVFP4's QSNR increases with κ when κ < 4, but it is initially counterintuitive — outlier mitigation should help, not hurt. The paper explains this through the E4M3 scale variant of Theorem 2: with high-precision per-block scaling, the normal-region error has a −κ²/g term (the block maximum maps with near-zero error), while the subnormal error has a +κ²·p_sub term. For κ values typical of block size 16 (Q3 ~2–2.4), the normal-region term dominates, so reducing κ increases the normal-region error contribution. This is a subtle and important finding: it implies that FP4 with fine-grained scaling can actually perform better on slightly spikier data — a counterintuitive property that INT formats do not share.


Critical Assessment

Claim 1: "MXINT8 consistently outperforms MXFP8 in both direct-cast inference and low-bit training."

This claim is strongly supported by the evidence. The tensor-level analysis (Figure 4a) shows MXINT8 winning 100% of 10,752 tensors with an average QSNR advantage of ~8.85 dB. The direct-cast inference (Table 3) shows MXINT8 winning on all 12 models spanning 0.6B–235B parameters and two model families. The low-bit training experiments (Figure 5, Table 4) show MXINT8 achieving loss ~0.001 lower than MXFP8 and downstream accuracy within ±0.01 of BF16 across two model sizes and six reasoning tasks.

The robustness of this claim is exceptional — there is no condition, model, or granularity within the evaluated space where MXFP8 outperforms MXINT8. The theoretical prediction (crossover at κ = 7.55) and the measured κ distribution (Q3 = 2.96 at block size 32) are well-separated, meaning this result should generalize to any model whose activation crest factors at block size 32 are below ~7.5 — which is almost certainly true for transformer-based LLMs.

Caveat: All training experiments use only 8-bit formats (not 6-bit or 4-bit), and only two model sizes (1B and 3B) are trained. While the inference results scale to 235B, the training results are limited to relatively small models. It is plausible that INT8 training at larger scales (70B+) could reveal stability issues not present at 1B–3B, though the consistency of the inference results across 390× parameter range is reassuring.

Claim 2: "NVINT4 can surpass NVFP4 when combined with Hadamard rotation."

This claim is strongly supported with a precise condition: rotation is necessary for the reversal. Without rotation, NVFP4 wins at the model level (12/12 models) despite NVINT4 winning 64.3% of tensor-level comparisons (Figure 4a, Table 3). With rotation, NVINT4 wins 99.3% of tensor-level comparisons and 12/12 model-level comparisons (Figure 4b, Table 3). The mechanism is clearly explained: rotation pushes the κ distribution (Q3 from 2.39 to 2.11) below the crossover threshold (κ = 2.39), and NVFP4's QSNR paradoxically degrades under rotation in this κ regime.

The evidence quality is strong because the reversal is predicted by theory (Figure 3), validated at the tensor level (Figure 4), and confirmed at the model level (Table 3). The finding is nuanced — it is not a universal "INT4 beats FP4" claim but a conditional one — and the paper specifies the condition precisely.

Missing evidence: The paper does not evaluate NVINT4 training, only inference. It is plausible that the gradient bias issue fixed by symmetric clipping at 8 bits reappears in more severe form at 4 bits, or that INT4 training has additional numerical stability challenges. This is a reasonable scope limitation for a comparison paper but leaves open the question of whether the NVINT4 inference advantage translates to training.

Claim 3: "The symmetric clipping method resolves gradient bias in fine-grained low-bit INT training, enabling nearly lossless performance for MXINT8 training."

This claim is well-supported by the evidence presented. Figure 2 and Table 10 demonstrate that asymmetric [-128, 127] clipping degrades training loss relative to symmetric [-127, 127], and that the degradation is worse at finer granularities where the unique negative extreme affects proportionally more values. The numerical stability analysis (Table 11) reveals that 16.82% of values map to −128 even when the scale is designed for a symmetric range due to BFloat16 precision, making symmetric clipping a numerical necessity rather than merely a statistical preference. The training experiments (Figure 5, Table 4) demonstrate that with symmetric clipping, MXINT8 training matches BF16 accuracy within ~0.01 on average across six reasoning tasks.

Missing evidence: The paper demonstrates that symmetric clipping is necessary (asymmetric degrades loss) and sufficient (symmetric enables near-lossless training), but does not explore whether other clipping strategies (learned clipping thresholds per channel or per block, or dynamic clipping based on activation statistics) could achieve similar or better results. The symmetric clipping fix is computationally trivial (one fewer value in the quantization grid, ~0.4% reduction in theoretical information capacity), so the simplicity is a strength, but the paper does not demonstrate that it is optimal, only that it works.

Claim 4: "Fine-grained INT formats are significantly more area- and energy-efficient than floating-point counterparts at matched throughput."

This claim is based on the gate-level hardware model in Appendix C and the results in Table 5. MXINT8 reduces energy by 37% and area by 21% vs. MXFP8; NVINT4 reduces energy by 38% and area by 30% vs. NVFP4; the mixed-format "MXINT8 + NVINT4" reduces area by 34% vs. "MXFP8 + NVFP4."

The evidence quality for this claim is moderate but difficult to fully assess from the paper alone. The hardware model's assumptions are documented (TSMC FinFET library, combinational logic only, no placement/routing overhead, equal toggle rates across cells, psum_bit_width = 24), but the paper does not validate the model against actual silicon measurements or published chip specifications. The relative comparisons (normalized to MXFP8) are directionally credible — FP adders are well-known to be more expensive than INT adders due to alignment and normalization logic — but the absolute magnitude of the savings (37% energy, 21% area) should be treated as estimates subject to implementation-specific factors.

Missing evidence: The paper does not evaluate the impact of the quantizer block itself (excluded from the hardware model) on total area/energy, nor does it model the cost of the Hadamard rotation preprocessing when comparing NVINT4 + rotation to NVFP4 without rotation. The 30% area savings for NVINT4 vs. NVFP4 are stated at matched throughput, but if rotation adds latency or area overhead (e.g., additional matrix multiplications before the quantized GEMM), the net system-level efficiency advantage may be lower. The paper also does not compare against a hypothetical INT-optimized datapath that could exploit INT-specific optimizations (e.g., fused multiply-add without alignment stages).

Claim 5: "The current hardware trajectory, which is increasingly focused on FP, is suboptimal."

This is the paper's strongest and most consequential claim. The evidence supporting it is the combination of: (1) MXINT8's consistent algorithmic superiority over MXFP8 (Figures 4, 5; Tables 3, 4), (2) NVINT4's ability to surpass NVFP4 under rotation (Figure 4b, Table 3), and (3) the hardware cost advantages (Table 5). Taken together, these demonstrate that a format choice driven by coarse-granularity intuition (FP handles outliers better) leads to suboptimal outcomes at the fine granularities modern hardware has adopted.

The claim is appropriately qualified: the paper does not argue that all formats should be INT — MXINT6 and MXINT4 still lose to their FP counterparts even after rotation, and FP dominates at coarse granularities. The advocacy is specifically for fine-grained INT8 (and INT4 when combined with rotation) rather than a universal INT-first approach.

Unresolved tension: The paper's strongest algorithmic result is for 8-bit formats, but the hardware trend toward FP is most established at 8 bits (FP8 training and inference are already widely deployed). The 4-bit result (NVINT4 surpassing NVFP4 under rotation) is algorithmically impressive but requires the rotation preprocessing step, and the paper does not demonstrate 4-bit INT training — only inference. A hardware architect reading this paper might reasonably conclude that MXINT8 should be adopted but that the case for NVINT4 is less mature, since training at 4 bits is an active research area and the paper only evaluates inference for 4-bit INT formats. The paper's policy recommendation would be strengthened by demonstrating NVINT4 training results comparable to the MXINT8 training demonstration.

Additional weakness: No error bars, confidence intervals, or statistical significance tests. The tensor-level win rates are percentages computed across 10,752 tensors, which is a large enough sample that 64.3% vs. 99.3% is clearly a meaningful difference. But the model-level comparisons (12/12 wins) lack statistical rigor — with N = 12 models, a clean sweep could occur by chance if the true win probability were, say, 0.8 (probability of 12/12 at p = 0.8 is ~6.9%). The training results (Table 4) show accuracy differences of 0.01–0.40 percentage points across six tasks, but without error bars (e.g., standard deviation across training seeds), it is impossible to assess whether MXINT8's slight accuracy advantage over MXFP8 (57.02% vs. 56.86%) is statistically significant or within noise.

Additional weakness: The difficulty estimation cost analogy is relevant here but manifests differently. The tensor-level QSNR analysis requires capturing 10,752 tensors from a full forward-backward pass, which is expensive to compute. For a practitioner deciding between INT8 and FP8 training, this analysis is not necessary — the paper's empirical results provide sufficient evidence. But for a hardware architect evaluating new formats (e.g., a hypothetical 5-bit or 7-bit format not covered in this paper), the theoretical framework (Theorems 1 and 2) would need to be validated on new models, requiring the same expensive tensor capture process. The paper would benefit from a lightweight method for estimating κ distributions from a few tensors or from model architecture parameters, but this is not provided.

Missing experiment: Varying block size continuously. The paper evaluates two discrete block sizes (32 for MX, 16 for NV) and channel-wise granularity. A continuous sweep of block sizes (e.g., 8, 16, 32, 64, 128) would directly validate the theoretical prediction that INT advantage grows monotonically as block size shrinks (since κ decreases). This would strengthen the central claim that granularity is the key variable and make the crossover framework more predictive for future hardware that might adopt non-standard block sizes.

Missing experiment: Non-Gaussian data distributions. The theoretical analysis (Theorems 1 and 2) assumes X_i ~ N(0, σ²). Real LLM activations are not Gaussian — they have heavier tails (outliers) and are often asymmetric (e.g., after ReLU/SwiGLU). The tensor-level measurements use real data, so the QSNR measurements in Figure 4 are valid, but the theoretical crossover predictions (Figure 3) might be less accurate for non-Gaussian distributions. The paper does not analyze how the crest factor distribution differs from the Gaussian assumption or how this affects crossover threshold accuracy.

Missing experiment: Comparison against non-AbsMax quantizers. The paper exclusively uses AbsMax quantization with symmetric clipping. Alternative quantizers — such as those based on minimizing L2 error (e.g., optimal quantizer for Gaussian distributions), learned clipping thresholds (e.g., PACT, LSQ), or activation-aware methods (e.g., AWQ, SmoothQuant) — might change the INT-vs-FP comparison by altering the effective crest factor or by making the quantization grid more efficient for the data distribution. The paper's comparison isolates format differences by holding the quantizer constant, which is methodologically clean, but it means the results apply specifically to AbsMax quantizers, which are suboptimal for both INT and FP. An FP format with a learned clipping threshold might close some of the gap with INT8.

6. Limitations and Trade-offs

MXINT6 and MXINT4 Cannot Match FP Counterparts Even With Rotation

The assumption or constraint. The paper's theoretical framework (Section 4, Figure 3) predicts crossover thresholds of κ = 1.96 for MXINT6 vs. MXFP6 and κ = 2.04 for MXINT4 vs. MXFP4. At block size 32, the measured crest factor distributions (Table 2) have a 75th percentile of 2.96 without rotation and 2.39 with rotation — both above these crossover thresholds. This means that even with Hadamard rotation, the bulk of the κ distribution remains in the regime where FP dominates.

The consequence. MXINT6 and MXINT4 are not competitive alternatives to MXFP6 and MXFP4 at the granularities studied. The tensor-level win rates after rotation are only 5.5% for MXINT6 and 1.3% for MXINT4 (Figure 4b), and at the model level, MXINT6 wins 1 of 12 models while MXINT4 wins 0 of 12 (Table 3). This fundamentally limits the paper's advocacy for INT formats: the strongest case is at 8 bits only. For sub-8-bit quantization, which is where the efficiency gains from reduced precision are largest, FP formats retain a decisive accuracy advantage that the paper's methods cannot overcome. A hardware architect reading this work might reasonably adopt MXINT8 while keeping FP datapaths for 4-bit and 6-bit modes — a mixed-format design that complicates the circuit reuse argument (Table 7) since the INT and FP pipelines would need to coexist.

What evidence exists in the paper. Figure 4b shows MXINT6 achieving 30.18 dB QSNR vs. MXFP6's 31.03 dB, and MXINT4 achieving 17.22 dB vs. MXFP4's 18.79 dB — gaps of ~0.85 dB and ~1.57 dB respectively. Table 3 shows MXINT6 losing 11 of 12 models and MXINT4 losing all 12 after rotation. The KL divergence numbers (Tables 12–13) are striking: MXINT4 produces divergences of 10,000–30,000+ while MXFP4 produces 6,000–20,000 — often a factor of ~2× difference. These are not marginal losses; they represent qualitatively worse output distributions.

Mitigation status. The paper does not attempt to close the 6-bit and 4-bit gaps. The theoretical framework (Theorem 1) shows that INT QSNR improves with 6.02 × b − 20 log₁₀(κ), meaning that at lower bit widths, the same κ produces a lower absolute QSNR, and the −20 log₁₀(κ) penalty becomes a larger fraction of the total. The only path to making sub-8-bit INT competitive at current block sizes would be to further reduce κ — for example, through full-dimension Hadamard rotations (rather than block-level), more aggressive outlier suppression (e.g., SmoothQuant-style per-channel smoothing before block quantization), or adaptive block sizing that uses smaller blocks for outlier-heavy tensors. None of these are explored. The paper acknowledges this limitation only implicitly through its focus on 8-bit training and its framing of the 4-bit result as conditional on rotation, but does not discuss whether sub-8-bit INT could ever be made competitive at these granularities or whether fundamentally smaller block sizes (e.g., block-8) would be needed.


No 4-Bit or 6-Bit Training Results — Only Inference

The assumption or constraint. The paper's training experiments (Section 5.3) are restricted to 8-bit precision (MXFP8 vs. MXINT8), training 1B and 3B models for 100B and 200B tokens respectively. The authors justify this by noting that "FP8 training is demonstrated to be nearly lossless in prior work" (Section 5.3), framing the contribution as showing that INT8 can match this established baseline. No 4-bit or 6-bit training is attempted for either format family.

The consequence. The paper cannot assess whether the NVINT4 inference advantage under rotation (Figure 4b, 99.3% tensor-level win rate; Table 3, 12/12 model wins) translates to training. This is a critical gap because training imposes stricter requirements than inference: gradients are accumulated across many steps, making quantization bias (like the asymmetric-range problem identified in Section 3.2) more damaging, and the backward pass quantizes gradient tensors (operations ③–⑥ in Figure 1) that have different κ distributions than forward activations. The symmetric clipping fix demonstrated for INT8 (Figure 2, Table 10) might not suffice at 4 bits, where the quantization grid is so coarse that even symmetric bias could destabilize training. Moreover, the paper's own negative result with ReST^{EM} in Appendix K (noting that sequential revisions degraded performance) suggests that training dynamics can break in unexpected ways when quantization interacts with optimization — a risk that is unquantified for INT4 training.

A related consequence: without training results, the paper cannot claim that the hardware efficiency advantages of NVINT4 (38% energy reduction, 30% area reduction vs. NVFP4; Table 5) apply to training accelerators, only to inference accelerators. Since training dominates the total compute budget for LLM development (pretraining runs often consume >99% of total FLOPs), the lack of training evidence leaves the most economically significant use case unaddressed for 4-bit formats.

What evidence exists in the paper. The only training evidence is for 8-bit (Section 5.3, Figure 5, Table 4). The tensor-level QSNR analysis (Figure 4) includes gradient tensors (operations ③–⑥ in Figure 1) along with activations and weights, showing that NVINT4 + rotation wins 99.3% of all tensor types — including gradients — at the QSNR level. This is suggestive but not sufficient: QSNR measures per-tensor information preservation, not whether the accumulated gradient signal over thousands of steps remains stable enough for optimization. The absence of training results for 4-bit and 6-bit formats is a gap in the evidence chain between QSNR measurements and the paper's hardware advocacy.

Mitigation status. The paper does not address this limitation. Section 7's call for "prioritizing fine-grained INT formats" does not distinguish between inference and training, nor between 8-bit and 4-bit. A reader might incorrectly infer that the NVINT4 inference advantage implies training advantage. The paper would benefit from explicitly stating that 4-bit INT training remains an open problem and that the current results only establish INT4's competitiveness for inference workloads (or for the forward pass in training when combined with higher-precision backward passes).


Hadamard Rotation Overhead Is Not Accounted for in the Hardware or Accuracy Comparisons

The assumption or constraint. The paper's headline 4-bit result — "NVINT4 can surpass NVFP4 when combined with Hadamard rotation" (Section 1, Table 3, Figure 4b) — requires an additional preprocessing step. For each forward pass, the activations must be multiplied by a random Hadamard matrix R (size h × h where h is the block size: 32 for MX, 16 for NV), and the weights must be pre-multiplied by R^T. While the weight rotation is a one-time offline cost (equivalent to a single matrix multiplication per weight matrix), the activation rotation must be performed online during inference, adding computation before every quantized GEMM.

The consequence. The paper does not measure, model, or account for the computational cost of Hadamard rotation in any of its comparisons. For the hardware cost analysis (Section 6, Appendix C), the quantizer block is explicitly excluded from the MMU model, and the rotation is not mentioned. For the accuracy comparisons (Table 3, Figure 4b), rotation is treated as a free preprocessing step — the KL divergence numbers compare rotated INT4 against rotated FP4, not against unrotated FP4. This matters because the rotation itself consumes FLOPs and adds latency. A fair comparison of NVINT4 + rotation vs. NVFP4 (without rotation) would need to account for the rotation cost. The paper's own hardware model (Table 5) estimates NVINT4 as 38% more energy-efficient than NVFP4, but if rotation costs more than 38% of the GEMM energy, the net system-level advantage disappears. The rotation operation is essentially a dense matrix multiplication (X @ R), which has the same asymptotic complexity as the quantized GEMM itself (X_q @ W_q) if the rotation dimension equals the hidden dimension; at block-level rotation (h = 16 or h = 32), the cost is lower but still non-trivial.

Additionally, the rotation matrices must be stored (or generated on-the-fly from a known seed), adding memory traffic. For inference deployments where latency is critical, the serial dependency (rotate, then quantize, then multiply) increases the critical path length compared to directly quantizing and multiplying.

What evidence exists in the paper. None. The paper reports rotated and unrotated results side by side (Table 3, Figure 4) but never quantifies the cost of rotation in FLOPs, latency, or energy. The hardware cost model (Appendix C) explicitly "exclude[s] the quantizer block in VPU to isolate the cost driven by multiplication and accumulation" — the rotation is an additional preprocessing step before quantization, and it is similarly excluded. The paper's comparison of "NVINT4 + rotation" against "NVFP4 + rotation" is internally fair, but the practical deployment question is "NVINT4 + rotation vs. NVFP4 without rotation," and that comparison is absent.

Mitigation status. The paper acknowledges this implicitly by reporting both rotated and unrotated results, allowing a reader to see that NVFP4 without rotation (20.60 dB average QSNR, Figure 4a) is comparable to NVINT4 with rotation (21.65 dB, Figure 4b) — a ~1 dB difference that might be consumed by the rotation's computational cost. However, the paper does not discuss this trade-off or provide guidance on when the rotation cost is justified. The authors suggest in Section 7 that "algorithm-hardware co-design" should "prioritize fine-grained INT formats," but do not address whether the rotation step should be integrated into that co-design (e.g., as a fused rotate-and-quantize hardware unit) or whether future INT4 quantization schemes could achieve rotation-free competitiveness through smaller block sizes or better quantizer designs.


Single-Task Domain: All Results Are on Language Modeling With WikiText2 or Pretraining Corpora

The assumption or constraint. Every tensor-level measurement, inference evaluation, and training experiment in the paper uses data from language modeling: WikiText2 for tensor capture and inference evaluation (Section 5.1–5.2), and OLMo2-Mix-1124 for training (Section 5.3). The downstream evaluation tasks are all common-sense reasoning benchmarks (HellaSwag, WinoGrande, ARC, PIQA, OpenbookQA — Table 4), which test a specific subset of LLM capabilities. The 12 evaluated models span two families (Qwen3 and Llama-3) and both dense and MoE architectures, providing diversity in model design but not in task domain.

The consequence. The crest factor distributions that drive the entire INT-vs-FP comparison may be task-dependent. WikiText2 consists of Wikipedia articles — relatively clean, well-structured expository text. The activation statistics (outlier magnitude, κ distribution) might differ substantially for other modalities or task types:

  • Code generation: code has different token distributions (more punctuation, keywords, structured indentation) that could produce different activation patterns.
  • Long-context tasks: WikiText2 sequences are 4096 tokens; at longer sequence lengths (e.g., 32K–128K tokens now common in production), attention patterns and KV-cache activations might exhibit different outlier characteristics that shift the κ distribution.
  • Multimodal inputs: visual or audio tokens prepended to text could introduce activation outliers at modality boundaries that change the per-block κ distribution.
  • Reasoning-intensive tasks: chain-of-thought or mathematical reasoning might produce different activation sparsity patterns than next-token prediction on Wikipedia text.

If the κ distribution shifts substantially in these domains, the crossover thresholds that the paper establishes (κ = 7.55 for 8-bit, κ = 2.39 for 4-bit NV) remain valid, but the measured κ might cross them at different block sizes or under different rotation schemes. The paper's quantitative claims ("MXINT8 wins 100% of tensors") are thus specific to WikiText2 activation statistics and may not transfer to all deployment scenarios.

What evidence exists in the paper. None outside of language modeling. The paper does not evaluate on code (e.g., HumanEval, MBPP), multimodal tasks, long-context benchmarks, or any non-text domain. The theoretical framework (Theorems 1 and 2) is distribution-agnostic — it only depends on κ, not on the specific distribution — so if a practitioner measures κ on their target domain and finds it below the relevant crossover threshold, the theory predicts INT will dominate. But the paper does not provide such measurements for other domains, nor does it defend the claim that WikiText2 κ distributions are representative.

Mitigation status. The paper does not address this. The diversity argument is made along model architecture and size axes (12 models, 0.6B–235B, dense and MoE, two families) but not along task or modality axes. Section 7 states the paper's findings should guide "future AI accelerators" without qualifying the task scope. A reader deploying quantized models for code completion, document summarization, or multimodal chatbots cannot infer from this paper alone whether MXINT8 will outperform MXFP8 on their specific workload, because they cannot assume the κ distribution matches WikiText2.


Hardware Model Omits Quantizer, Rotation, and Real-World Implementation Overheads

The assumption or constraint. The hardware cost model (Section 6, Appendix C) estimates relative area and energy of the Matrix-Multiply Unit (MMU) only — specifically, the MAC array, shared FP32 accumulator, and dequantizer. The authors state: "the quantizer is excluded from all cost accounting" and "we ignore sequential elements, placement and routing, and interconnect to enable technology-aware, relative comparisons" (Appendix C). The toggle rate τ_g is assumed equal across all cell types for simplicity.

The consequence. The reported hardware savings (37% energy, 21% area for MXINT8 vs. MXFP8; 38% energy, 30% area for NVINT4 vs. NVFP4; Table 5) are isolated to the MAC datapath and systematically exclude:

  • The quantizer itself, which computes AbsMax per block, performs scale division/multiplication, and applies the quantization mapping. For FP formats, this includes exponent extraction; for INT formats, this includes clipping. Different format families may have different quantizer costs, potentially offsetting some of the MAC datapath savings.
  • The Hadamard rotation unit, as discussed in the previous limitation. If NVINT4 requires rotation to surpass NVFP4 (Table 3), the total hardware cost must include the rotation logic.
  • Sequential and interconnect overhead. The model estimates combinational logic area only; real chips spend significant area on flip-flops, clock trees, SRAM for scale factor storage (one UE8M0 or E4M3 scale per 32 or 16 elements, which adds ~2–5% storage overhead relative to the data), and wire routing between MAC lanes and accumulators. FP datapaths may require wider routing for exponent buses; INT datapaths may require simpler control logic. The net effect of these excluded factors on the relative INT-vs-FP comparison is unknown.
  • Technology and library dependence. The model uses a single TSMC FinFET standard-cell library. Different process nodes, cell libraries, or accelerator architectures (systolic vs. SIMD vs. tensor-core-style) might have different area/energy ratios for the sub-blocks (e.g., barrel shifters might be relatively more expensive in some libraries). The paper does not perform sensitivity analysis over technology parameters.

The 37% energy savings claim is therefore best understood as an upper bound on MAC-datapath-only savings under the specific modelling assumptions, not as a prediction of total chip-level savings. Real implementations would likely see lower relative savings due to the fixed costs of quantization logic, memory, and interconnect that are format-independent or less format-sensitive.

What evidence exists in the paper. The model is described in detail in Appendix C with equations (45)–(48) for area and energy aggregation, the sub-block decomposition in Table 6, and the reuse schemes in Table 7. The paper provides no validation against published chip specifications (e.g., NVIDIA's disclosed area/energy for Blackwell's FP8 tensor cores, or Google's TPU publications). The model is entirely analytical — it predicts relative costs from gate counts, not from measurements of fabricated or simulated designs.

Mitigation status. The paper is transparent about what the model excludes ("the quantizer is excluded," "we ignore sequential elements, placement and routing, and interconnect") and frames the results as enabling "technology-aware, relative comparisons" rather than absolute chip-level predictions. This is a reasonable scope for an algorithm-hardware co-design paper, but it means the hardware claims should be interpreted as directional evidence for INT efficiency rather than precise quantified savings. The paper does not discuss how sensitive the results are to the excluded factors or provide error bounds on the estimates. A cautious reading is that the paper has demonstrated that INT MAC datapaths are cheaper than FP MAC datapaths (a well-known result the paper formalizes with gate-level decomposition), but the magnitude of the system-level savings remains an open question.


The Asymmetric-Range Gradient Bias Fix Has Only Been Tested at Small Scale and One Model Architecture

The assumption or constraint. The symmetric clipping method (Section 3.2) that enables near-lossless MXINT8 training is evaluated on exactly two training runs: a 1B Llama-3-style model trained for 100B tokens and a 3B model trained for 200B tokens (Section 5.3, Table 9). The ablation demonstrating the necessity of symmetric clipping (Figure 2, Table 10) uses an even smaller 145M model trained for only 20B tokens. All training uses the Llama-3 architecture with GQA attention and SwiGLU activations.

The consequence. The paper cannot guarantee that symmetric clipping remains sufficient for stable INT8 training at larger scales (e.g., 70B, 405B parameters) or for different architectures (e.g., non-GQA attention, different activation functions, mixture-of-experts routing). Several scaling-related failure modes are plausible:

  • At larger model sizes, the crest factors of gradient tensors might differ from those at 1B–3B, potentially requiring different clipping strategies.
  • The interaction between symmetric clipping and optimization hyperparameters (learning rate schedule, weight decay, gradient clipping) might change at scale. The paper's training uses a single learning rate schedule (cosine decay to 0.1 × max LR) and optimizer configuration (AdamW with β1 = 0.9, β2 = 0.95); sensitivity to these choices is not tested.
  • MoE architectures (included in the inference evaluation but not in training) have additional quantization points at the routing and expert-combining stages that might introduce new gradient bias sources not present in dense architectures.

Additionally, the numerical stability analysis (Table 11) demonstrating that 16.82% of values map to −128 under BFloat16 arithmetic is performed on random Gaussian matrices, not on real training tensors. The fraction of affected values might differ for real gradients and activations, and the impact on training stability might be non-linear (a small fraction of biased gradients might not matter; a large fraction might cause divergence). The paper demonstrates that the fix works at 1B–3B scale but does not characterize how the bias scales with model size or training duration.

What evidence exists in the paper. The ablation study (Figure 2, Table 10) is the only direct evidence isolating the symmetric clipping effect. The 145M model at 20B tokens is small by modern standards, and the loss differences (∼0.01 at block size 32) are meaningful but not catastrophic — a practitioner might overlook them and attribute INT8's underperformance to format inferiority rather than clipping asymmetry. The main training results (1B, 3B) show MXINT8 matching BF16 within ∼0.01 average accuracy (Table 4), which is encouraging but is only two data points at modest scale.

Mitigation status. The paper does not discuss scaling limitations or architecture sensitivity. The symmetric clipping fix is presented as a general solution with no caveats about model size, architecture, or training duration. Given that the paper's central claim — that the industry should shift toward INT formats — depends partly on INT8 training being competitive with FP8 training, the limited training evidence is a significant gap. Future work would need to demonstrate MXINT8 training at 7B+, on multiple architectures, and ideally for full training budgets comparable to production pretraining runs (trillions of tokens) before the claim can be considered fully validated. The paper acknowledges the need for "more investigation about low-bit training at larger scales" only implicitly through its focus on "nearly lossless" rather than "fully lossless" training, which is insufficient.

7. Implications and Future Directions

How This Work Changes the Landscape

This paper is best understood as a diagnostic reframing of the INT-vs-FP quantization debate, not a paradigm shift or a new algorithm. The field was not asking the wrong question — it was asking the question at the wrong granularity and without the analytical tools to answer it precisely. By identifying the block-local crest factor κ as the single sufficient statistic governing the trade-off and providing closed-form QSNR expressions for both format families (Theorems 1 and 2), the paper transforms a format comparison from an empirical benchmarking exercise into a predictable, transferable engineering decision.

The magnitude of this contribution is somewhere between an incremental refinement and a paradigm shift. It does not introduce a new quantization algorithm that outperforms existing methods — the quantizer is standard AbsMax, and the formats are existing industry specifications (MX, NV). What it does is reorient the hardware design trajectory by demonstrating that the current FP-centric path was chosen based on evidence from the wrong granularity regime. This is a reframing contribution: the paper argues that the question "Should hardware support INT or FP?" is ill-posed without specifying the block size, and it provides the theoretical and empirical machinery to answer the correctly-posed question.

Several specific shifts make this work consequential:

It resolves the tension between coarse-granularity FP superiority and fine-granularity INT competitiveness. Prior to this work, a hardware architect could reasonably point to FP8's dominance at per-tensor and per-channel quantization (where κ is 10–60) and conclude that FP is the safer bet for all granularities. The paper demonstrates that this conclusion does not transfer: at block size 32, the 75th-percentile κ drops to ~2.96 (Table 2), well below the 8-bit crossover threshold of 7.55 (Figure 3), and MXINT8 achieves a ~8.85 dB QSNR advantage over MXFP8 (Figure 4a). This is not a marginal edge case — it is the operating regime of the MX formats that NVIDIA has already committed to in Blackwell silicon. The paper effectively shows that the hardware industry standardized a format at a granularity where the alternative format is superior.

It establishes that verifier/format quality, not search algorithm sophistication, is the bottleneck for test-time compute scaling — WITH A DIFFERENT MEANING HERE. In the quantization context, the "verifier" is the number format itself. The paper's finding that FP's mantissa-bound QSNR (equation 41: 13.80 + 6.02M dB) provides a hard ceiling independent of granularity — while INT's QSNR improves continuously as block size shrinks (equation 25: the −20 log_10(κ) term decreases) — redirects attention from "how do we design better quantization algorithms?" to "how do we pick the right format for the κ distribution our block size produces?" This is analogous to the paper's earlier insight about verifier over-optimization in test-time compute scaling (Section 5.3): the bottleneck is not the optimization algorithm but the reliability of the signal being optimized. Here, the "signal" is numerical fidelity, and the "reliability" is determined by format choice conditioned on κ.

It makes the INT-vs-FP comparison actionable for practitioners. Rather than requiring exhaustive benchmarks on every new model, a practitioner can now:

  1. Measure the κ distribution of their model's activations at their target block size (a one-time profiling cost).
  2. Compare the measured κ (e.g., the 75th percentile) to the crossover thresholds in Figure 3.
  3. Select the format predicted to win, with the theoretical framework providing a mechanistic explanation for the choice, not just empirical precedent.

The paper demonstrates this pipeline works: the theoretical crossover at κ = 7.55 for 8-bit correctly predicts MXINT8's 100% win rate (Figure 4a), and the crossover at κ = 2.39 for NVINT4 correctly predicts the near-tie without rotation (64.3% win rate) and the sweep with rotation (99.3%, since rotation pushes Q3 κ from 2.39 to 2.11, crossing below the threshold). This is theory-driven engineering, not trial-and-error.

It reframes Hadamard rotation from a generic accuracy booster to a format-decision tool. Prior work (Ashkboos et al., QuaRot, SpinQuant) presented rotation as improving quantization accuracy for any format. The paper's contribution is showing that rotation's effect on the INT-vs-FP comparison is discontinuous: for 8-bit, rotation helps both formats but the winner is unchanged (MXINT8 already dominates); for 4-bit NV, rotation flips the winner from FP to INT because it pushes the κ distribution across the crossover threshold. This means the decision to apply rotation and the decision to choose INT or FP are coupled — a hardware architect designing an INT4 datapath should also plan for rotation support; an algorithm designer choosing between NVFP4 and NVINT4 should measure κ after rotation, not before. This coupling was unrecognized in prior work.

Some research directions become less attractive as a result of this paper:

  • Designing ever-more-sophisticated FP formats with additional exponent bits at 8-bit precision. The paper's QSNR analysis (Figure 4a) shows MXFP8 already operates at its mantissa-bound ceiling (~31.5 dB) for the κ values typical of block size 32. Adding exponent bits would not improve QSNR (the bottleneck is mantissa resolution, not dynamic range), and the hardware cost would increase. The return on investment for further FP8 format engineering is low.
  • Comparing INT and FP at coarse granularities without acknowledging the granularity-dependence. The paper has established that coarse-granularity comparisons (per-channel, per-tensor) systematically favor FP and do not generalize to block-wise quantization. Future work that makes claims about "INT vs. FP" without specifying block size and measuring κ is missing the central variable.
  • Treating block size as an implementation detail rather than a design parameter. The paper demonstrates that block size determines κ, which determines the optimal format. Future quantization research should treat block size as a first-class hyperparameter jointly optimized with format choice, not as a fixed constraint.

Research directions that become more attractive:

  • Cheap, online κ estimation without collecting 10,752 tensors. The paper's tensor-level analysis is expensive (8 forward-backward passes on an 8B model). If κ can be estimated from a few samples, or predicted from model architecture parameters, the format selection pipeline becomes practical for deployment.
  • Format-adaptive hardware that can switch between INT and FP datapaths per-layer based on measured κ. Since different tensor types (activations, weights, gradients) have different κ distributions, a heterogeneous chip that routes high-κ tensors to FP units and low-κ tensors to INT units could capture the best of both format families.
  • Training-aware format optimization at 4 bits. The paper's 4-bit results are inference-only. Demonstrating that NVINT4 + rotation can support stable training would be the critical next step for the paper's hardware advocacy, since training dominates total FLOPs.
  • Extending the theoretical framework to non-Gaussian data. The Gaussian assumption in Theorems 1 and 2 is mathematically convenient but real LLM activations have heavier tails. A theory that predicts κ distributions from known properties of transformer activations (e.g., attention-score sparsity, SwiGLU nonlinearity) would make the crossover framework fully predictive without requiring per-model measurement.

Follow-Up Research This Work Enables

1. Training a lightweight κ predictor that enables per-layer format selection without expensive profiling.

The paper's tensor-level analysis (Section 5.1) required capturing 10,752 tensors from 8 WikiText2 sequences through Llama-3.1-8B — a computationally expensive one-time cost. For a deployment engineer deciding between MXINT8 and MXFP8 for a new model, repeating this process is prohibitive. A strong follow-up would train a small predictor model (e.g., a linear probe or lightweight MLP) that takes as input a layer's position in the network, its hidden dimension, and a small number of activation samples (say, 16–32 tokens) and predicts the per-tensor κ distribution (e.g., the 75th percentile). The training data would be the κ distributions from this paper's 10,752 tensors, plus additional models (e.g., Mistral, Gemma, Phi) to ensure generalizability. Success would mean the predictor's κ estimates are within ~5% of measured κ, enabling format selection in seconds rather than hours. A failure case — where κ distributions differ unpredictably across model families — would establish that per-model profiling is unavoidable, which itself informs hardware design (chips should support both INT and FP if κ cannot be predicted in advance).

2. INT4 training with symmetric clipping and rotation — a direct test of whether the 4-bit inference advantage extends to optimization.

The paper demonstrates that NVINT4 surpasses NVFP4 at inference with rotation (Table 3, 12/12 model wins) but only evaluates 8-bit training. The critical unaddressed question is whether the symmetric clipping fix (Section 3.2) that enables near-lossless INT8 training remains sufficient at 4 bits, where the quantization grid has only 15 levels (symmetric [−7, 7]). A follow-up study would replicate the training protocol (1B and 3B Llama-style models, OLMo2-Mix-1124, 100B/200B tokens) but with NVINT4 + rotation quantizing all six operations in Figure 1. The metrics should include not just final loss and downstream accuracy but also gradient statistics during training (mean, variance, and autocorrelation of the gradient bias term) to diagnose whether the symmetric clipping fix eliminates the asymmetric-range problem at 4-bit resolution or whether new instabilities emerge from the coarser grid. A positive result — NVINT4 training matching NVFP4 training within 0.5% accuracy on downstream tasks — would dramatically strengthen the paper's hardware advocacy by showing INT4 is viable for training accelerators. A negative result — INT4 training diverging or significantly underperforming FP4 — would establish a boundary: INT formats are superior for inference at 4 bits and for training at 8 bits, but training at 4 bits requires FP's non-uniform quantization grid to handle gradient dynamics. This boundary would directly inform mixed-precision training accelerator design.

3. A continuous sweep of block sizes from 4 to 256 to empirically validate the κ-dependent crossover theory.

The paper evaluates two discrete block sizes: 32 (MX) and 16 (NV), plus per-channel. The theoretical framework (Figure 3) predicts that INT advantage grows monotonically as block size shrinks (κ decreases → INT QSNR improves while FP QSNR is mantissa-bound). A follow-up experiment would fix a single model (e.g., Llama-3.1-8B) and format pair (e.g., MXINT8 vs. MXFP8) and sweep block sizes from 4 to 256 in powers of 2, measuring both κ distributions and QSNR at each granularity. The key output would be an empirical crossover block size — the granularity at which MXINT8's average QSNR first exceeds MXFP8's — and a validation of whether the theoretical prediction (the crossover κ of 7.55 corresponds to a block size where the 50th or 75th percentile κ equals 7.55) matches measurement. This experiment tests a core prediction of the theory: that the INT advantage is not specific to block sizes 16 and 32 but emerges continuously as granularity increases. It would also inform future hardware: if MXINT8 already dominates at block 64 (i.e., the crossover occurs at coarser granularity than current MX), then hardware can use larger blocks for INT8 (saving scale factor storage) without losing the format advantage.

4. Per-tensor-type format assignment: probing whether activations and gradients should use different formats.

The paper's tensor-level analysis (Figure 4) aggregates QSNR across all six tensor types (①–⑥ in Figure 1) when computing win rates. However, different tensor types have different κ distributions: activations (①,⑤) tend to have heavier tails due to attention outliers, while weights (②,④) are more Gaussian due to weight decay, and gradients (③,⑥) may have different noise characteristics. A follow-up study would break out the QSNR and win rate statistics by tensor type. The hypothesis is that activations, with higher κ, might benefit relatively more from FP's dynamic range, while weights, with lower κ, might strongly favor INT. If true, a mixed-format deployment — FP8 for activations, INT8 for weights — could outperform either uniform-format approach. The paper's hardware reuse analysis (Table 7) shows that mixing formats incurs overhead (INT and FP pipelines must coexist), but if the accuracy gain is substantial (e.g., >0.5 dB QSNR improvement over uniform INT8), the trade-off may be worthwhile. A negative result — all tensor types show the same format preference — would simplify hardware design: a uniform INT8 datapath would be universally optimal. A mixed result would motivate per-tensor-type format assignment, adding complexity but potentially recovering additional accuracy at the same bit width.

5. Extending the comparison to non-language domains: code generation, long-context, and multimodal inputs.

The paper's entire empirical evaluation uses WikiText2 (Wikipedia text) for tensor capture and inference, and OLMo2-Mix-1124 (a pretraining corpus) for training. The κ distributions that drive the format comparison may be domain-dependent. A natural follow-up would replicate the tensor-level analysis (Section 5.1) on three contrasting domains:

  • Code generation: Process Python/JavaScript files through a code-adapted LLM (e.g., CodeLlama, DeepSeek-Coder) and measure κ distributions. Code has structured syntax with frequent punctuation tokens; the activation patterns during code completion (where the model attends to recent indentation and variable names) might differ from natural language next-token prediction.
  • Long-context retrieval: Process 32K-token documents through a long-context model (e.g., Llama-3.1-8B with extended context) and measure κ at different context positions (early, middle, late). The attention sink phenomenon (where early tokens receive disproportionately high attention) might create κ outliers at specific positions that change the format comparison.
  • Multimodal inputs: Process image-text pairs through a vision-language model (e.g., LLaVA) and measure κ separately for visual tokens, text tokens, and modality-boundary tokens. Visual tokens might have different activation statistics than text tokens, and the boundary region might create κ spikes.

For each domain, the output would be a domain-specific κ distribution that can be compared to the paper's crossover thresholds. If κ distributions are domain-invariant (e.g., the 75th percentile at block 32 remains ~2.5–3.0 across all domains), the paper's conclusions generalize and the format recommendation is robust. If κ varies substantially (e.g., code exhibits κ of ~5 at block 32 due to structured attention patterns), then domain-specific format selection becomes necessary. The paper's own framework provides the tool for this analysis — the follow-up simply applies it to new data.

6. A system-level comparison including rotation cost: when does NVINT4 + rotation beat NVFP4 without rotation in total FLOPs?

The paper's headline 4-bit result — NVINT4 surpasses NVFP4 under rotation — is internally fair (both formats use rotation) but does not address the practical deployment question: an engineer choosing between formats is comparing NVINT4 with rotation against NVFP4 without rotation, not against rotated NVFP4. The rotation step adds computation: for a block-level 16×16 Hadamard rotation applied to activations before each GEMM, the cost is approximately O(h²) per block where h = 16, which is small relative to the GEMM itself (O(h³) if the hidden dimension is the block dimension) but non-zero. A follow-up study would:

  1. Measure the wall-clock latency and FLOPs of the Hadamard rotation step on target hardware (e.g., an NVIDIA GPU with CUDA kernels).
  2. Combine this with the paper's hardware model (Appendix C) to estimate total system energy: MMU energy from Table 5 plus rotation energy from measurement.
  3. Compare the end-to-end energy and latency of "NVFP4, no rotation" vs. "NVINT4 with rotation" for a representative inference workload (e.g., one forward pass of Llama-3.1-8B on a 4096-token prompt).

The key unknown is the rotation's energy as a fraction of the GEMM energy. If rotation plus NVINT4 GEMM energy is still lower than NVFP4 GEMM energy (plausible given NVINT4's 38% energy advantage per MMU operation), then rotation is "free" in an energy sense and the format recommendation stands. If rotation consumes, say, 50% of the GEMM energy, then the net advantage of NVINT4 + rotation over NVFP4 (without rotation) might be negligible or negative, and the format decision depends on whether rotation's accuracy benefit (the ~1.3 dB QSNR improvement from 20.55 to 21.65 dB; Figure 4) justifies the energy cost. This analysis is necessary to convert the paper's algorithmic finding into an actionable deployment recommendation.


Practical Applications and Downstream Use Cases

1. Inference accelerator design for LLM serving: replacing FP8 tensor cores with INT8.

The most direct application of the paper's findings is in the design of the next generation of AI inference accelerators. The paper demonstrates that MXINT8 achieves ~8.85 dB higher QSNR than MXFP8 at matched bit width (Figure 4a) while requiring 21% less area and 37% less energy in the MAC datapath (Table 5). For a cloud inference provider serving millions of LLM queries per day, these savings compound: a 37% energy reduction on the dominant operation (matrix multiplication) translates to approximately 20–30% lower total chip power (since MAC units dominate area and energy in AI accelerators), directly reducing electricity costs and enabling higher throughput within a fixed power budget. The accuracy case is equally strong: MXINT8 wins on all 12 models evaluated, from 0.6B to 235B parameters (Table 3), with KL divergences to BF16 that are consistently lower than MXFP8 (e.g., Llama-3.1-70B: MXINT8 KL = 191 vs. MXFP8 KL = 514; Table 13).

The practical decision for a hardware architect reading this paper is clear: for 8-bit inference, there is no accuracy-energy trade-off — INT8 dominates on both axes. The symmetric clipping fix (Section 3.2) is trivial to implement in hardware (it simply discards one integer code from the quantization grid) and does not add latency. The main implementation consideration is that existing FP8 tensor cores (e.g., NVIDIA Blackwell's) would need to be redesigned or supplemented with INT8 datapaths, representing a non-trivial engineering investment. But for new accelerator designs starting from a clean slate, the paper provides compelling evidence that an INT8-first approach is optimal at the block sizes (32) that the MX standard has already defined.

2. Pretraining infrastructure: adopting MXINT8 for low-bit training to reduce training FLOPs without accuracy loss.

The paper's training results (Section 5.3) demonstrate that MXINT8 training matches BF16 accuracy within ~0.01 average across six reasoning tasks (Table 4) while using half the numerical precision. For organizations training LLMs from scratch at scales of hundreds of billions to trillions of tokens, replacing FP8 training (the current near-lossless baseline) with INT8 training would reduce the energy cost of every training FLOP by ~37% at the MAC unit level (Table 5). For a hypothetical 1-trillion-token training run on a 100B-parameter model, this could translate to millions of dollars in electricity savings and corresponding carbon footprint reduction, assuming the training hardware supports INT8 GEMM with the same throughput as FP8 GEMM.

The practical barrier is that current training accelerators (NVIDIA H100/B200, Google TPUv5) do not natively support MXINT8 — they support FP8 (E4M3/E5M2) in their tensor cores. Adopting MXINT8 training therefore requires either new hardware or software emulation (which would negate the energy savings). The paper's contribution is establishing the algorithmic case for INT8 training, which can inform the design of next-generation training chips. A training infrastructure provider reading this paper should factor MXINT8 support into their hardware roadmap, particularly if they are designing custom accelerators for in-house LLM training. The symmetric clipping fix is critical here — without it (as Figure 2 shows), INT8 training underperforms FP8, and the hardware case would collapse.

3. Edge and on-device deployment: using MXINT8 to maximize accuracy under tight silicon area and power constraints.

For on-device LLM inference (smartphones, laptops, wearables), silicon area and power are hard constraints that cannot be scaled by adding more chips. The paper's hardware analysis (Table 5) shows that MXINT8 reduces area by 21% vs. MXFP8 at matched throughput. In an edge SoC where the neural engine's area budget is fixed (e.g., 5 mm² for the entire ML accelerator), switching from FP8 to INT8 tensor cores frees ~1 mm² of silicon that can be reallocated to larger on-chip SRAM (reducing costly DRAM accesses), more MAC lanes (increasing throughput), or additional functionality. Combined with the algorithmic advantage (MXINT8 produces output distributions closer to BF16 than MXFP8; Table 3), this means edge devices can achieve both better accuracy and better efficiency simultaneously — a rare win-win in hardware-constrained deployment.

A concrete scenario: a smartphone manufacturer deploying a quantized 7B-parameter LLM for on-device summarization. With MXFP8, the model's accuracy might be acceptable but the inference latency exceeds the 500ms target for interactive use. Switching to MXINT8 reduces MAC energy by 37%, allowing the chip to run at higher clock frequency within the same thermal envelope, or to use the freed area for additional MAC lanes to increase throughput. The KL divergence results (Table 13: Llama-3.1-8B MXINT8 KL = 82 vs. MXFP8 KL = 359) suggest the output quality would actually improve — the device gets faster responses that are closer to the BF16 reference model's behavior. The symmetric clipping fix is transparent to the deployment pipeline; it is a one-time change to the quantization function with no runtime overhead.

4. Mixed-precision accelerator design: INT-based 8-bit + 4-bit chips for future GPU/TPU architectures.

The paper's mixed-format analysis (Table 5, Table 7) shows that a chip supporting both MXINT8 and NVINT4 achieves 34% area reduction vs. one supporting MXFP8 and NVFP4, primarily because INT datapaths can be reconfigured between 8-bit and 4-bit modes with simpler masking logic (Table 7, "INT reuse scheme 2") than FP datapaths, which must handle different exponent/mantissa decompositions and alignment requirements at each precision. For a GPU architect designing a Blackwell-successor chip that natively supports two precisions (e.g., 8-bit for high-accuracy inference and training, 4-bit for maximum-throughput inference), the paper provides a concrete design recommendation: use INT for both precision levels, with rotation support for the 4-bit mode to maintain accuracy parity with FP4 (Table 3: NVINT4 + rotation wins 12/12 models vs. NVFP4 + rotation).

The practical benefit is not just area savings but design complexity reduction. An INT-only pipeline can handle both 8-bit and 4-bit operations with the same control logic, the same adder tree structure (no exponent alignment stages), and the same rounding modes. Debugging, verification, and physical design are all simplified when the datapath is uniform. The trade-off is that the chip cannot run MXFP6/MXFP4 workloads that some models might expect — but the paper's results suggest those workloads are suboptimal anyway: MXINT6 and MXINT4 currently lose to FP counterparts (Table 3), but the 8-bit and 4-bit (with rotation) cases are won by INT. An INT-only chip that supports MXINT8 and NVINT4 + rotation would cover the two most important precision levels for inference (8-bit for accuracy-critical, 4-bit for throughput-critical) while being smaller and lower-power than a comparable FP-supporting chip.


When to Prefer This Method

The paper proposes a format selection framework (not a single method) based on comparing measured crest factor distributions against format-specific crossover thresholds. The decision rule is:

  • Prefer MXINT8 over MXFP8 when the block-local crest factor at block size 32 has a 75th percentile below 7.55. Empirically, this holds for all 12 evaluated LLMs without rotation and all 12 with rotation (Table 3). The paper's tensor-level measurements (Table 2) show Q3 κ = 2.96 without rotation and 2.39 with rotation at block size 32 — both far below 7.55. This condition is expected to hold for transformer-based LLMs generally, since κ at block size 32 is driven by local activation statistics within small groups, not by the rare global outliers that produce per-channel κ of 10–60. No counterexample (a model where MXFP8 outperforms MXINT8 at block size 32) was found across 12 models from two families.

  • Prefer NVINT4 over NVFP4 when the block-local crest factor at block size 16, after Hadamard rotation, has a 75th percentile below 2.39. Without rotation, Q3 κ = 2.39 (Table 2) — exactly at the crossover — and NVFP4 wins at the model level (Table 3, 12/12). With rotation, Q3 κ drops to 2.11, and NVINT4 wins (12/12). This condition therefore requires rotation to be applied; without it, NVFP4 is preferred. The decision to use rotation and the decision to use INT4 are coupled.

  • Prefer MXFP6 and MXFP4 over MXINT6 and MXINT4 at block size 32 (and likely at all practical block sizes). Even after rotation, Q3 κ = 2.39 at block size 32 (Table 2) remains above the crossover thresholds of 1.96 (MXINT6) and 2.04 (MXINT4). INT6 and INT4 lose to FP at both tensor level (Figure 4b: 5.5% and 1.3% win rates) and model level (Table 3: 1/12 and 0/12 wins). To make sub-8-bit INT competitive, smaller block sizes (e.g., block 8 or block 4) would be needed to push κ below 2.0 — a regime not evaluated in this paper.

  • Prefer FP at coarse granularities (per-channel, per-tensor). The channel-wise crest factor Q3 is 11.97 (Table 2), far above all crossover thresholds. At these granularities, FP's dynamic range advantage is decisive, and INT is not competitive. This is consistent with prior work and with the industry's initial FP preference — the paper's contribution is showing this preference reverses at fine granularity, not that it was wrong for its original context.